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US5659885A Expired / Lapsed US ⏱️ 0.0 years remaining

Radio frequency switch including voltage multiplier

Assignee: National Semiconductor Corp
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Filing: 1994-10-20
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Granted: 1997-08-19
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Expires: 2014-10-20
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Abstract

Abstract A radio frequency switch includes a field-effect-transistor (FET) having a gate connected to a voltage multiplier. The control voltage for the switch is delivered to the voltage multiplier which delivers an increased gate voltage to turn the switch on. The voltage multiplier is driven by fluctuations of the control voltage as a transceiver, for example, is switched from the transmit to the receive mode.

Inventors

  • 👤 Mark Douglas McDonald
  • 👤 Paul Anthony Denny
  • 👤 Thai Minh Nguyen
  • 👤 David Edward Bien

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 11:08
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/06; H03K17/063; H04; H04B; H04B1/00; H04B1/38; H04B1/40; H04B1/44

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 109 words
A radio frequency unit comprising: a control logic unit; a voltage multiplier; and a field-effect-transistor (FET) switch; said voltage multiplier being connected between said control logic unit and a gate of said FET switch so as to bias said gate at a multiple of a supply voltage when said FET switch is turned on; wherein said voltage multiplier comprises a flip-flop, a capacitor and a FET, said FET being connected between a first side of said capacitor and said supply voltage, said first side of said capacitor being connected to a power-supply input of said flip-flop, a second side of said capacitor being connected to said control logic unit.
Claim 2
Dependent Claim 109 words
A radio frequency unit comprising: a control logic unit; a voltage multiplier; and a field-effect-transistor (FET) switch; said voltage multiplier being connected between said control logic unit and a gate of said FET switch so as to bias said gate at a multiple of a supply voltage when said FET switch is turned on; wherein said voltage multiplier comprises a flip-flop, a capacitor and a FET, said FET being connected between a first side of said capacitor and said supply voltage, said first side of said capacitor being connected to a power-supply input of said flip-flop, a second side of said capacitor being connected to said control logic unit.
Claim 3
Dependent Claim 21 words
The radio frequency of claim 1 wherein an output of said flip-flop is connected to a gate of said FET switch.
Claim 4
Dependent Claim 220 words
A radio transceiver comprising: an antenna; a transmitter; a receiver; first and second FET switches; a voltage multiplier, wherein said voltage multiplier comprises a flip-flop, a capacitor and a FET, said FET being connected between a first side of said capacitor and said supply voltage, said first side of said capacitor being connected to a power-supply input of said flip-flop, a second side of said capacitor being connected to a control logic unit; and a first control voltage and a second control voltage supplied alternately to said voltage multiplier from said control logic unit, each of said first and second control voltages being at a substantially constant level; said first FET switch being connected between said antenna and said transmitter, said second FET switch being connected between said antenna and said receiver, said voltage multiplier supplying an output voltage to a gate of said first FET switch and an inverted form of said output voltage to a gate of said second FET switch when said control logic unit supplies said first control voltage to said voltage multiplier, said voltage multiplier supplying said output voltage to said gate of said second FET and said inverted form of said output voltage to said gate of said first FET when said control logic unit supplies said second control voltage to said voltage multiplier.
Claim 5
Dependent Claim 220 words
A radio transceiver comprising: an antenna; a transmitter; a receiver; first and second FET switches; a voltage multiplier, wherein said voltage multiplier comprises a flip-flop, a capacitor and a FET, said FET being connected between a first side of said capacitor and said supply voltage, said first side of said capacitor being connected to a power-supply input of said flip-flop, a second side of said capacitor being connected to a control logic unit; and a first control voltage and a second control voltage supplied alternately to said voltage multiplier from said control logic unit, each of said first and second control voltages being at a substantially constant level; said first FET switch being connected between said antenna and said transmitter, said second FET switch being connected between said antenna and said receiver, said voltage multiplier supplying an output voltage to a gate of said first FET switch and an inverted form of said output voltage to a gate of said second FET switch when said control logic unit supplies said first control voltage to said voltage multiplier, said voltage multiplier supplying said output voltage to said gate of said second FET and said inverted form of said output voltage to said gate of said first FET when said control logic unit supplies said second control voltage to said voltage multiplier.
Claim 6
Dependent Claim 24 words
The radio transceiver of claim 3 further comprising an inverter connected between said voltage multiplier and one of said first and second FET switches.
Claim 7
Independent Claim 145 words
A method of alternately connecting and disconnecting a radio transmitter and an antenna, said method comprising: providing a FET switch; providing a supply voltage; multiplying said supply voltage in a voltage multiplier, said voltage multiplier being driven by a control voltage which alternates between a first level and a second level, wherein said voltage multiplier further comprises a flip-flop, a capacitor and a FET, said FET being connected between a first side of said capacitor and said supply voltage, said first side of said capacitor being connected to a power-supply input of said flip-flop, a second side of said capacitor being connected to a control logic unit; and applying said multiplied supply voltage to a gate of said FET switch so as to turn said FET switch on and removing said multiplied supply voltage from said gate so as to turn said FET switch off.
Claim 8
Independent Claim 145 words
A method of alternately connecting and disconnecting a radio transmitter and an antenna, said method comprising: providing a FET switch; providing a supply voltage; multiplying said supply voltage in a voltage multiplier, said voltage multiplier being driven by a control voltage which alternates between a first level and a second level, wherein said voltage multiplier further comprises a flip-flop, a capacitor and a FET, said FET being connected between a first side of said capacitor and said supply voltage, said first side of said capacitor being connected to a power-supply input of said flip-flop, a second side of said capacitor being connected to a control logic unit; and applying said multiplied supply voltage to a gate of said FET switch so as to turn said FET switch on and removing said multiplied supply voltage from said gate so as to turn said FET switch off.
Claim 9
Dependent Claim 17 words
The method of claim 5 wherein said supply voltage is multiplied by a factor of approximately two.

References Cited (Backward Citations)

US4430756A Cited
US5047674A Cited
US5258662A Cited
US5426334A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-08-18 2001-02-17 2001-08-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-08-18 2005-02-17 2005-08-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-08-18 2009-02-17 2009-08-19 $7700.00 Window Closed / Lapsed

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