US5657088A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System and method for extracting caption teletext information from a video signal
Assignee: Cirrus Logic Inc
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Filing: 1995-12-22
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Granted: 1997-08-12
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Expires: 2015-12-22
Abstract
Abstract A clocking circuit for extracting data from a video signal where the data is imbedded with other data and where the clocking rate for obtaining the data is slow as compared to the actual data rate. The circuit derives a calculated starting point for the data, using a double sample rate and a derivative to determine the beginning of the first data pulse. A clock signal is then derived which is calculated to between the leading and trailing edges of any received data pulse.
Inventors
- 👤 Robert J. Hankinson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 10:13
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/025; H04N7/035; H04N7/0352
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
139 words
A circuit for extracting data from a signal when the data is embedded in the signal at intervals and interspersed with other data and where the sampling rate of the signal which is used to convert the signal from analog to digital is slower than the data rate of the data to be extracted, said circuit comprising: means for sampling a digital conversion of the signal to generate binary samples at a rate greater than the analog to digital sampling rate; means for detecting from said greater binary signal samples a beginning edge of a first data bit to be extracted; means for determining a midpoint of a data bit of said data to be extracted; and means for generating a clock signal calculated to be at the midpoint of each data bit of said data to be extracted.
Claim 2
Dependent Claim
139 words
A circuit for extracting data from a signal when the data is embedded in the signal at intervals and interspersed with other data and where the sampling rate of the signal which is used to convert the signal from analog to digital is slower than the data rate of the data to be extracted, said circuit comprising: means for sampling a digital conversion of the signal to generate binary samples at a rate greater than the analog to digital sampling rate; means for detecting from said greater binary signal samples a beginning edge of a first data bit to be extracted; means for determining a midpoint of a data bit of said data to be extracted; and means for generating a clock signal calculated to be at the midpoint of each data bit of said data to be extracted.
Claim 3
Dependent Claim
30 words
The invention set forth in claim 1 wherein said beginning edge detecting means includes: means for determining when a rising portion of said first data bit reaches its largest value.
Claim 4
Dependent Claim
23 words
The invention set forth in claim 2 wherein said largest value means includes means for taking a derivative of said greater binary signal.
Claim 5
Dependent Claim
21 words
The invention set forth in claim 1 further including: means for selectively establishing a repetitive period of said calculated clock signal.
Claim 6
Dependent Claim
44 words
The invention set forth in claim 1 wherein said detecting means includes a state machine having the following states: a threshold detection state, a top of signal detection state, a wait for the middle of the detected pulse state, and an initiate sampling state.
Claim 7
Independent Claim
134 words
A method for extracting data from a signal when the data is embedded in the signal at intervals and interspersed with other data and where the sampling rate of the signal which is used to convert the signal from analog to digital is slower than the data rate of the data to be extracted, said method comprising the steps of: sampling a digital conversion of the signal to generate binary samples at a rate greater than the analog to digital sampling rate; detecting from said greater binary signal samples a beginning edge of a first data bit to be extracted; determining a midpoint of a data bit of said data to be extracted; and generating a clock signal calculated to be at the midpoint of each data bit of said data to be extracted.
Claim 8
Independent Claim
134 words
A method for extracting data from a signal when the data is embedded in the signal at intervals and interspersed with other data and where the sampling rate of the signal which is used to convert the signal from analog to digital is slower than the data rate of the data to be extracted, said method comprising the steps of: sampling a digital conversion of the signal to generate binary samples at a rate greater than the analog to digital sampling rate; detecting from said greater binary signal samples a beginning edge of a first data bit to be extracted; determining a midpoint of a data bit of said data to be extracted; and generating a clock signal calculated to be at the midpoint of each data bit of said data to be extracted.
Claim 9
Dependent Claim
31 words
The method set forth in claim 6 wherein said beginning edge detecting step includes the step of: determining when a rising portion of said first data bit reaches its largest value.
Claim 10
Dependent Claim
25 words
The method set forth in claim 7 wherein said largest value determining step includes the step of: calculating a derivative of said greater binary signal.
Claim 11
Dependent Claim
22 words
The method set forth in claim 6 further including the step of: selectively establishing a repetitive period of said calculated clock signal.
Claim 12
Dependent Claim
44 words
The method set forth in claim 6 wherein said detecting step includes a state machine having the following states: a threshold detection state; a top of signal detection state; a wait for the middle of the detected pulse state; and an initiate sampling state.
Claim 13
Dependent Claim
103 words
A circuit for extracting certain data from a video signal, said circuit comprising: an input for accepting a video signal; a sampler circuit for generating outputs corresponding to samples taken of accepted video signals; a circuit for calculating from said generated outputs a derivative output; a circuit for calculating a beginning point of a data pulse of said data signal, said pulse having a certain width, said circuit operating on said generated outputs and on said derivative output; and a sample generator for providing a repetitive clocking pulse delayed from said calculated beginning point a certain amount and having a fixed repetition rate.
Claim 14
Dependent Claim
103 words
A circuit for extracting certain data from a video signal, said circuit comprising: an input for accepting a video signal; a sampler circuit for generating outputs corresponding to samples taken of accepted video signals; a circuit for calculating from said generated outputs a derivative output; a circuit for calculating a beginning point of a data pulse of said data signal, said pulse having a certain width, said circuit operating on said generated outputs and on said derivative output; and a sample generator for providing a repetitive clocking pulse delayed from said calculated beginning point a certain amount and having a fixed repetition rate.
Claim 15
Dependent Claim
48 words
The invention set forth in claim 11 further including: means for predetermining the width of each pulse of said repetitive pulse; and means for controlling said certain delay so that said clocking pulse will occur between said calculated beginning point and an end point of said pulse signal.
Claim 16
Dependent Claim
18 words
The invention set forth in claim 12 wherein said repetition rate is determined by said predetermined pulse width.
Claim 17
Dependent Claim
14 words
The invention set forth in claim 11 wherein said certain delay amount is selectable.
Claim 18
Dependent Claim
59 words
The invention set forth in claim 11 wherein said accepted video signal is a digital equivalent of an analog video signal, and wherein said circuit further includes: means for accepting said analog video signal and converting said accepted analog signal to said digital equivalent using a sample rate which is a multiple of the frequency of the color subcarrier.
Claim 19
Dependent Claim
12 words
The invention set forth in claim 15 wherein said multiple is four.
Claim 20
Dependent Claim
39 words
The invention set forth in claim 15 wherein said analog video signal represents bits of data and said multiple is in a range such that at least one sample is taken for each bit of said analog video signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-08-11 | 2001-02-10 | 2001-08-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-08-11 | 2005-02-10 | 2005-08-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-08-11 | 2009-02-10 | 2009-08-12 | $7700.00 | Window Closed / Lapsed |