US5649029A
Expired / Lapsed
US
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MPEG audio/video decoder
Assignee: LSI Corp
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Filing: 1994-09-23
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Granted: 1997-07-15
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Expires: 2014-09-23
Abstract
Abstract An MPEG audio/video decoder has memories, a signal processing unit (SPU) including a multiplier and a butterfly unit, a main CPU, and a memory controller which are time division multiplexed between decoding video and audio data. For audio decoding, the butterfly unit determines combinations of components of a frequency-domain vector to reduce the number of multiplies required to transform to the time domain (matrixing). Matrixing is interwoven with MPEG filtering to increases throughput of the decoder by increasing parallel use of the multiplier, the butterfly unit, and a memory controller. The decoder includes a degrouping circuit which performs two divisions in three clock cycles to degroup a subband code. Three cycles matches the write time of three components so that subband codes are degrouped and written to memory with a minimum delay. Performing two divides in three clock cycles allows the divider to be smaller. In response to an error signal from a source of an MPEG audio data stream, the decoder replaces data with an error code and temporarily enables error handling. The error code is a valid bit combination rarely found in MPEG audio data frames. During audio decoding with error handling enabled, the decoder checks for the error code and replaces the error code with reconstructed data. Typically, some subband data are replaced with zeros so that an error only changes some of the frequency components.
Inventors
- 👤 David E. Galbi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:47
CPC Classifications
H; H04; H04N; H04N19/00; H04N19/42; G; G10; G10L; G10L19/00; G10L19/02; H03; H03M; H03M7/00; H03M7/30; H03M7/40; H03M7/42; H03M7/425; H04N19/10; H04N19/102; H04N19/124; H04N19/126; H04N19/423; H04N19/43; H04N19/433; H04N19/436; H04N19/439; H04N19/44; H04N19/60; H04N19/61; H04N19/63; H04N19/90; H04N21/00; H04N21/40; H04N21/41; H04N21/426; H04N21/43; H04N21/434; H04N21/4341; H04N5/00; H04N5/44; H04N5/60; H04N5/602; G09; G09G; G09G2340/00; G09G2340/02; G10L19/005; H04N19/13; H04N19/70; H04N19/91; H04N5/14; H04N5/21
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
197 words
An integrated audio/video decoder comprising: an internal memory; means for alternately writing a block of audio data to the internal memory then writing a block of video data to the internal memory; and a signal processing unit which alternately decodes audio data from the internal memory then decodes video data from the internal memory, wherein: the internal memory comprises a first memory unit, a second memory unit, a third memory unit, and a fourth memory unit, all connected to the signal processing unit; when decoding audio data, the first memory unit contains components of encoded frequency domain sound samples, the second memory unit contains data used to decode subband audio data, the third memory unit contains components of the time domain audio vectors, and the fourth memory unit contains (a) decoded components of frequency domain vectors of sound samples, (b) an accumulation of time-domain vectors of sound samples, or (c) sound amplitude values; and when decoding video data, the first memory unit contains data used to dequantize DCT coefficients, the second memory unit contains quantized DCT coefficients, the third memory unit contains error terms, and the fourth memory unit contains intermediate values of the quantized DCT coefficients.
Claim 2
Dependent Claim
197 words
An integrated audio/video decoder comprising: an internal memory; means for alternately writing a block of audio data to the internal memory then writing a block of video data to the internal memory; and a signal processing unit which alternately decodes audio data from the internal memory then decodes video data from the internal memory, wherein: the internal memory comprises a first memory unit, a second memory unit, a third memory unit, and a fourth memory unit, all connected to the signal processing unit; when decoding audio data, the first memory unit contains components of encoded frequency domain sound samples, the second memory unit contains data used to decode subband audio data, the third memory unit contains components of the time domain audio vectors, and the fourth memory unit contains (a) decoded components of frequency domain vectors of sound samples, (b) an accumulation of time-domain vectors of sound samples, or (c) sound amplitude values; and when decoding video data, the first memory unit contains data used to dequantize DCT coefficients, the second memory unit contains quantized DCT coefficients, the third memory unit contains error terms, and the fourth memory unit contains intermediate values of the quantized DCT coefficients.
Claim 3
Dependent Claim
31 words
The audio/video decoder of claim 1, wherein the means for alternately writing further comprises an error code injector, which injects error codes into the audio data when an error is detected.
Claim 4
Dependent Claim
201 words
An integrated audio/video decoder comprising: an internal memory; means for alternately writing a block of audio data to the internal memory then writing a block of video data to the internal memory; and a signal processing unit that alternately decodes audio data from the internal memory then decodes video data from the internal memory, wherein the signal processing unit comprises: a multiplier which multiplies IDCT coefficients and dequantization coefficients during video decoding and multiplies components of quantized sample vectors and dequantization coefficients during audio decoding; and a butterfly unit which determines sums and differences of IDCT coefficients for an inverse discrete cosine transformation during video decoding and determines sums and differences of components of a frequency-domain sample vector during audio decoding; a first multiplexer having an output terminal coupled to a first input terminal of the multiplier; a second multiplexer having an output terminal coupled to a second input terminal of the multiplier; a third multiplexer having a first input terminal coupled to the output terminal of the multiplier and an output terminal coupled to a first input terminal of the butterfly unit; and a fourth multiplexer having an output terminal coupled to a second input terminal of the butterfly unit.
Claim 5
Dependent Claim
201 words
An integrated audio/video decoder comprising: an internal memory; means for alternately writing a block of audio data to the internal memory then writing a block of video data to the internal memory; and a signal processing unit that alternately decodes audio data from the internal memory then decodes video data from the internal memory, wherein the signal processing unit comprises: a multiplier which multiplies IDCT coefficients and dequantization coefficients during video decoding and multiplies components of quantized sample vectors and dequantization coefficients during audio decoding; and a butterfly unit which determines sums and differences of IDCT coefficients for an inverse discrete cosine transformation during video decoding and determines sums and differences of components of a frequency-domain sample vector during audio decoding; a first multiplexer having an output terminal coupled to a first input terminal of the multiplier; a second multiplexer having an output terminal coupled to a second input terminal of the multiplier; a third multiplexer having a first input terminal coupled to the output terminal of the multiplier and an output terminal coupled to a first input terminal of the butterfly unit; and a fourth multiplexer having an output terminal coupled to a second input terminal of the butterfly unit.
Claim 6
Dependent Claim
201 words
The audio video decoder of claim 3, wherein the internal memory comprises: a first memory unit coupled to provide a data signal to an input terminal of the first multiplexer; a second memory unit coupled to provide a data signal to an input terminal of the second multiplexer; a third memory unit coupled to provide a data signal to a second input terminal of the third multiplexer; and a fourth memory unit coupled to provide a data signal to an input terminal of the fourth multiplexer, wherein: when decoding audio data, the first memory unit contains components of encoded frequency domain sound samples, the second memory unit contains data used to decode subband audio data, the third memory unit contains components of the time domain audio vectors, and the fourth memory unit contains (a) decoded components of frequency domain vectors of sound samples, (b) an accumulation of time-domain vectors of sound samples, or (c) sound amplitude values; and when decoding video data, the first memory unit contains quantized DCT coefficients, the second memory unit contains data used to dequantize DCT coefficients, the third memory unit contains error terms, and the fourth memory unit contains intermediate values of the quantized DCT coefficients.
Claim 7
Dependent Claim
72 words
The audio/video decoder of claim 3, wherein the signal processing unit further comprises a fifth multiplexer having input terminals and an output terminal, wherein a first input terminal is coupled to a first output terminal of the butterfly unit and a second input terminal is coupled to a second output terminal of the butterfly unit, and further wherein the output terminal is coupled to both an audio clamp and a video clamp.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-07-14 | 2001-01-13 | 2001-07-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-07-14 | 2005-01-13 | 2005-07-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-07-14 | 2009-01-13 | 2009-07-15 | $7700.00 | Window Closed / Lapsed |