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US5646058A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating a self-aligned double-gate MOSFET by selective lateral epitaxy

Assignee: International Business Machines Corp
•
Filing: 1996-08-01
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Granted: 1997-07-08
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Expires: 2016-08-01
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Abstract

Abstract A novel method of fabricating a double-gate MOSFET structure is disclosed. The method utilizes selective lateral epitaxial growth of silicon into a thin gap formed between two sacrificial dielectric films for accurate thickness control. The sacrificial films are then replaced by a gate material (e.g., polysilicon) such that top and bottom gates are self-aligned to each other and to the channel region. Also disclosed is a self-aligned double-gate MOSFET constructed in accordance with the foregoing method.

Inventors

  • 👤 Yuan Taur
  • 👤 Hon-Sum Philip Wong

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 03:51
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6733; H10D30/6734

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 201 words
A method for fabricating a double-gate MOSFET, comprising the steps of: providing a silicon substrate; forming an oxide layer on the silicon substrate; forming a sacrificial dielectric film on the oxide layer; forming a spacer film on the sacrificial dielectric film; forming a sacrificial dielectric layer on the spacer film; patterning the sacrificial dielectric layer, the spacer film and the sacrificial dielectric film to form a channel therein; etching the spacer film to form a gap between the sacrificial dielectric layer and the sacrificial dielectric film; etching a slot in the oxide layer to expose the silicon substrate; growing epitaxial silicon in the slot, the channel and the gap, such that the silicon emerges from the gap at its ends; doping exposed regions of the epitaxial silicon; oxidizing the exposed silicon regions; stripping the patterned sacrificial dielectric film and the patterned sacrificial dielectric layer; forming oxide layers of about 100 Å or less on the epitaxial silicon in the regions from which the sacrificial dielectric film was removed; depositing polysilicon to form a top gate in the region formerly occupied by the patterned sacrificial dielectric layer, and a bottom gate in the region formerly occupied by the patterned sacrificial dielectric film.
Claim 2
Independent Claim 201 words
A method for fabricating a double-gate MOSFET, comprising the steps of: providing a silicon substrate; forming an oxide layer on the silicon substrate; forming a sacrificial dielectric film on the oxide layer; forming a spacer film on the sacrificial dielectric film; forming a sacrificial dielectric layer on the spacer film; patterning the sacrificial dielectric layer, the spacer film and the sacrificial dielectric film to form a channel therein; etching the spacer film to form a gap between the sacrificial dielectric layer and the sacrificial dielectric film; etching a slot in the oxide layer to expose the silicon substrate; growing epitaxial silicon in the slot, the channel and the gap, such that the silicon emerges from the gap at its ends; doping exposed regions of the epitaxial silicon; oxidizing the exposed silicon regions; stripping the patterned sacrificial dielectric film and the patterned sacrificial dielectric layer; forming oxide layers of about 100 Å or less on the epitaxial silicon in the regions from which the sacrificial dielectric film was removed; depositing polysilicon to form a top gate in the region formerly occupied by the patterned sacrificial dielectric layer, and a bottom gate in the region formerly occupied by the patterned sacrificial dielectric film.
Claim 3
Dependent Claim 14 words
The method of claim 1, wherein the sacrificial dielectric film is a nitride film.
Claim 4
Dependent Claim 14 words
The method of claim 1, wherein the sacrificial dielectric layer is a nitride layer.
Claim 5
Dependent Claim 13 words
The method of claim 1, wherein the spacer film is an oxide film.

References Cited (Backward Citations)

US4670768A Cited
US5120666A Cited
US5188973A Cited
US5273921A Cited
US5565368A Cited
US5461250A Cited
US5340754A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-07-07 2001-01-06 2001-07-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-07-07 2005-01-06 2005-07-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-07-07 2009-01-06 2009-07-08 $7700.00 Window Closed / Lapsed

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