Color sequential display panels

Claim 2

An integrated circuit random access video display for displaying an image from a video source, the integrated circuit comprising: an active matrix display region having an array of pixel electrodes and an array of pixel transistors, the pixel transistors formed from single crystal silicon material and registered to the array of pixel electrodes for actuating the pixel electrodes in response to an active matrix drive signal; and an active matrix control circuit interconnected to the active matrix display region for translating a video signal received from the video source into active matrix drive signals, the active matrix drive signals including a line clock signal and a selectable line address signal for random access addressing of selected pixel transistors, the active matrix control circuit including: an addressing circuit for randomly addressing the selected pixel transistors and generating the line address signal; at least one random access select line scanner for enabling an addressed row of pixel transistors in response to the line clock signal and the line address signal; and a column driver for providing an actuation signal to the enabled row of pixel transistors.

Claim 3

The integrated circuit of claim 1 wherein the video signal is a composite video signal.

Claim 4

The integrated circuit of claim 1 wherein the video signal is an analog RGB signal.

Claim 5

The integrated circuit of claim 1 further comprising a video controller for providing timing information to the select scanner and column driver.

Claim 6

The integrated circuit of claim 1 further comprising a video memory for storing at least one video image from digital data representing the video image.

Claim 7

The integrated circuit of claim 5 wherein the video memory comprises at least one frame buffer.

Claim 8

The integrated circuit of claim 1 wherein the array of pixel electrodes is at least a 1280×1024 array.

Claim 9

The integrated circuit of claim 1 wherein the pixel electrodes are individually addressable by the control circuit.

Claim 10

The integrated circuit of claim 1 wherein the array of pixel transistors are bonded to a substrate with an adhesive.

Claim 11

The integrated circuit of claim 1 wherein the active matrix drive signals further include a plurality of video data channels for providing actuation signals to the selected pixel transistors.

Claim 12

The integrated circuit of claim 10 wherein the control circuit selects a range of display rows which are to display a selected color from a plurality of displayable colors.

Claim 13

The integrated circuit of claim 11 wherein the range of display rows is a plurality of contiguous display rows.

Claim 14

The integrated circuit of claim 10 wherein the video channels are arranged so as to reduce interference between the channels.

Claim 15

The integrated circuit of claim 1 wherein the active matrix control circuit facilitates center-to-edge and edge-to-center addressing of the pixel transistors.

Claim 16

The integrated circuit of claim 1 wherein the active matrix control circuit transmits the address signal over a line address bus.

Claim 17

The integrated circuit of claim 1 wherein the active matrix control circuit scans the active matrix display region in a non-linear pattern.

Claim 18

A color sequential active matrix display system for displaying a color image from a video source, the system comprising: a light source for generating light; an integrated circuit random access video display including an active matrix display region interconnected with a control circuit, the display region having an array of pixel electrodes, an array of pixel transistors and an active matrix control circuit, the pixel transistors formed from single crystal silicon material and registered to the pixel electrodes, the control circuit translating a video signal received from the video source into active matrix drive signals which include a line clock signal and a selectable line address signal for random access addressing of selected pixel transistors, the selected pixel transistors actuating the pixel electrodes in response to the active matrix drive signals, the control circuit including: an addressing circuit for randomly addressing the selected pixel transistors and generating the line address signal; at least one random access select line scanner for enabling an addressed row of pixel transistors in response to the line clock signal and the line address signal; a column driver for providing an actuation signal to the enabled row of pixel transistors; and an optical system coupling the video display to the light source, the optical system separating light from the light source into a plurality of colors, each color being directed onto each pixel electrode in temporal sequence.

Claim 19

A color sequential active matrix display system for displaying a color image from a video source, the system comprising: a light source for generating light; an integrated circuit random access video display including an active matrix display region interconnected with a control circuit, the display region having an array of pixel electrodes, an array of pixel transistors and an active matrix control circuit, the pixel transistors formed from single crystal silicon material and registered to the pixel electrodes, the control circuit translating a video signal received from the video source into active matrix drive signals which include a line clock signal and a selectable line address signal for random access addressing of selected pixel transistors, the selected pixel transistors actuating the pixel electrodes in response to the active matrix drive signals, the control circuit including: an addressing circuit for randomly addressing the selected pixel transistors and generating the line address signal; at least one random access select line scanner for enabling an addressed row of pixel transistors in response to the line clock signal and the line address signal; a column driver for providing an actuation signal to the enabled row of pixel transistors; and an optical system coupling the video display to the light source, the optical system separating light from the light source into a plurality of colors, each color being directed onto each pixel electrode in temporal sequence.

Claim 20

The color sequential active matrix display system of claim 17 wherein the plurality of colors comprises red, green and blue.

Claim 21

The color sequential active matrix display system of claim 17 wherein the optical system includes a rotating prism.

Claim 22

The color sequential active matrix display system of claim 17 wherein each color is directed onto a plurality of contiguous lines of electrodes.

Claim 23

In an integrated circuit random access video display, a method of displaying an image from a video source, comprising the steps of: providing an active matrix display region having an array of pixel electrodes and an array of pixel transistors, the pixel transistors formed from single crystal silicon material and registered to the array of pixel electrodes for actuating the pixel electrodes in response to an active matrix drive signal; providing an active matrix control circuit interconnected to the active matrix display region; and in the control circuit, translating a video signal received from the video source into active matrix drive signals, the active matrix drive signals including a line clock signal and a selectable line address signal for random access addressing of selected pixel transistors by the steps of: in an addressing circuit, randomly addressing the selected pixel transistors and generating the line address signal; an at least one random access select line scanner, enabling an addressed row of pixel transistors in response to the line clock signal and the line address signal; and in a column driver, providing an actuation signal to the enabled row of pixel transistors.

Claim 24

In an integrated circuit random access video display, a method of displaying an image from a video source, comprising the steps of: providing an active matrix display region having an array of pixel electrodes and an array of pixel transistors, the pixel transistors formed from single crystal silicon material and registered to the array of pixel electrodes for actuating the pixel electrodes in response to an active matrix drive signal; providing an active matrix control circuit interconnected to the active matrix display region; and in the control circuit, translating a video signal received from the video source into active matrix drive signals, the active matrix drive signals including a line clock signal and a selectable line address signal for random access addressing of selected pixel transistors by the steps of: in an addressing circuit, randomly addressing the selected pixel transistors and generating the line address signal; an at least one random access select line scanner, enabling an addressed row of pixel transistors in response to the line clock signal and the line address signal; and in a column driver, providing an actuation signal to the enabled row of pixel transistors.

Claim 25

The method of claim 21 further comprising the step of providing timing information from a video controller to the select scanner and column driver.

Claim 26

The method of claim 21 further comprising the step of storing at least one video image in a video memory from digital data representing the video image.

Claim 27

The method of claim 21 wherein the step of translating further comprises providing actuation signals to the selected pixel transistors using a plurality of video data channels.

Claim 28

The method of claim 24 wherein the step of translating further comprises selecting a range of display rows which are to display a selected color from a plurality of displayable colors.

Claim 29

The method of claim 24 wherein the step of providing actuation signals further comprises arranging the video channels so as to reduce interference between the channels.

Claim 30

The method of claim 21 wherein the step of translating further comprises transmitting the address signal over a line address bus.

Claim 31

The method of claim 21 wherein the step of translating further comprises scanning the active matrix display region in a non-linear pattern.