Vacuum microelectronic devices with multiple planar electrodes

Claim 2

A process for fabricating microelectronic sources, comprising: producing in a substrate a first trench surrounding an island; oxidizing said substrate within said trench to form in said island an emitter tip and an oxide layer to define a first sacrificial mold layer; selectively depositing a first-level metal electrode on said mold layer, said electrode surrounding and being self-aligned with said emitter; and planarizing said substrate and first-level electrode.

Claim 3

The process of claim 1, further including: producing on said upper surface a second sacrificial mold layer containing a second trench surrounding said emitter; selectively depositing a second-level metal electrode in said second mold trench, said second-level electrode surrounding said emitter and being spaced above said first-level electrode; and planarizing said second-level electrode.

Claim 4

The process of claim 2, further including removing said second sacrificial mold layer and at least a portion of said first sacrificial mold layer to expose said emitter and first- and second-level electrodes.

Claim 5

The process of claim 3, wherein said emitter has a diameter of about 20 nm, an wherein said first-level electrode is spaced about 400 nm from said emitter.

Claim 6

The process of claim 3, wherein planarizing said first- and second-level electrodes includes mechanical polishing.

Claim 7

The process of claim 2, further including depositing a third sacrificial mold layer containing a third-trench surrounding said emitter on said planarized second-level electrode; selectively depositing a third-level metal electrode in said third mold trench, said third electrode surrounding said emitter and being spaced above said second-level electrode; and removing said third sacrificial mold layer, said second sacrificial mold layer and at least a portion of said first sacrificial mold layer to expose said emitter and said first-, second- and third-level electrodes.

Claim 8

A process for fabricating a vacuum microelectronic device, comprising: producing on a substrate an etch mask having a pattern which defines the shape, location, and size of an emitter and surrounding electrode; etching said substrate through said mask to produce an undercut trench having a floor and upwardly and outwardlytapering walls surrounding an emitter post having inwardly tapering walls; oxidizing said trench walls to produce an oxide layer on said walls and to produce within said emitter post a tapered emitter tip, the oxide layer enclosing an electrode cavity mold having an oxide floor and walls surrounding said emitter post; implanting the floor of said cavity with a seed layer; selectively depositing metal in said cavity, said metal bonding with said seed layer to produce metal electrode surrounding said emitter tip; planarizing said first level; fabricating at least a second level electrode coaxial with and spaced above said first level electrode by depositing on said planarized surface a second level oxide layer, etching an electrode trench, oxidizing said trench to form a second cavity mold, implanting a seed material in said second cavity, and depositing metal in said second cavity to form said second level electrode; planarizing said second level; and releasing said first and second level electrodes.

Claim 9

A process for fabricating a vacuum microelectronic device, comprising: producing on a substrate an etch mask having a pattern which defines the shape, location, and size of an emitter and surrounding electrode; etching said substrate through said mask to produce an undercut trench having a floor and upwardly and outwardlytapering walls surrounding an emitter post having inwardly tapering walls; oxidizing said trench walls to produce an oxide layer on said walls and to produce within said emitter post a tapered emitter tip, the oxide layer enclosing an electrode cavity mold having an oxide floor and walls surrounding said emitter post; implanting the floor of said cavity with a seed layer; selectively depositing metal in said cavity, said metal bonding with said seed layer to produce metal electrode surrounding said emitter tip; planarizing said first level; fabricating at least a second level electrode coaxial with and spaced above said first level electrode by depositing on said planarized surface a second level oxide layer, etching an electrode trench, oxidizing said trench to form a second cavity mold, implanting a seed material in said second cavity, and depositing metal in said second cavity to form said second level electrode; planarizing said second level; and releasing said first and second level electrodes.

Claim 10

The process of claim 7, further including fabricating at least a third level electrode coaxial with and spaced above said first and second level electrodes.

Claim 11

The process of claim 7, further including depositing a thin conformal layer of oxide on said undercut trench; removing the portion of said conformal layer on said trench floor by a vertical etch to expose said substrate; etching said substrate to deepen said undercut trench to thereby form a silicon support post beneath said emitter post; and thereafter oxidizing said trench walls.

Claim 12

The invention of claim 7, wherein releasing said electrodes includes: forming a window trench around and within said electrodes to expose inner and outer surfaces of said electrodes; and etching away oxide between adjacent electrodes and between said electrodes and said emitter to thereby produce a released self-aligned, multiple electrode microstructure.