Error correction verification method and apparatus using CRC check remainders

Claim 2

An error correction system for rotating magnetic media, the error correction system comprising: a CRC generator/checker which generates CRC check remainder bytes by (1) using input data from a read sector to obtain regenerated CRC bytes for the read sector, and (2) adding the regenerated CRC bytes to incoming CRC bytes of the read sector; a correction unit which generates error patterns for correcting errors in the read sector; a correction checker unit, responsive to the CRC check remainder bytes and the error patterns, for confirming that the error patterns accurately correct the errors in the read sector, the correction checker unit including: a predetermined number of registers into which are loaded a corresponding predetermined number of the CRC check remainder bytes; for each register of the predetermined number of registers having its CRC check remainder byte affected by one of the error patterns in the sector, an adder for adding a corresponding affecting one of the error patterns to the register; a circuit for determining whether the contents of any of the registers indicates inaccurate correction of the errors.

Claim 3

An error correction system for rotating magnetic media, the error correction system comprising: a CRC generator/checker which generates CRC check remainder bytes by (1) using input data from a read sector to obtain regenerated CRC bytes for the read sector and (2) adding the regenerated CRC bytes to incoming CRC bytes of the read sector; a correction unit which generates error patterns for correcting errors in the read sector; a correction checker unit, responsive to the CRC check remainder bytes and the error patterns, for confirming that the error patterns accurately correct the errors in the read sector, wherein the correction checker unit comprises a first stage, and wherein the first stage includes: a register having a register input terminal and a register output terminal; a register input gate connected to control input to the register input terminal; a timing control gate which receives signals at least derived from the error patterns; an adder, the adder having a first input terminal connected to an output terminal of the timing control gate and a second input terminal connected to the register output terminal, an adder output terminal of the adder being connected to a first input terminal of the register input gate; a second input terminal of the register input gate being connected to receive the CRC check remainder bytes; a feedback multiplier connected between the register output terminal and a third input terminal of the register input gate.

Claim 4

An error correction system for rotating magnetic media, the error correction system comprising: a CRC generator/checker which generates CRC check remainder bytes by (1) using input data from a read sector to obtain regenerated CRC bytes for the read sector and (2) adding the regenerated CRC bytes to incoming CRC bytes of the read sector; a correction unit which generates error patterns for correcting errors in the read sector; a correction checker unit, responsive to the CRC check remainder bytes and the error patterns, for confirming that the error patterns accurately correct the errors in the read sector, wherein the correction checker unit comprises a first stage, and wherein the first stage includes: a register having a register input terminal and a register output terminal; a register input gate connected to control input to the register input terminal; a timing control gate which receives signals at least derived from the error patterns; an adder, the adder having a first input terminal connected to an output terminal of the timing control gate and a second input terminal connected to the register output terminal, an adder output terminal of the adder being connected to a first input terminal of the register input gate; a second input terminal of the register input gate being connected to receive the CRC check remainder bytes; a feedback multiplier connected between the register output terminal and a third input terminal of the register input gate.

Claim 5

The system of claim 2, wherein the correction checker unit comprises a plurality of stages including the first stage and at least one further stage, the further stage differing from the first stage by having the second input terminal of the register input gate connected to the register output terminal of a preceding one of the plurality of stages.

Claim 6

The system of claim 2, wherein the correction checker unit has six stages.

Claim 7

The system of claim 2, wherein the correction checker unit has a number of stages corresponding to a programmable number of CRC bytes per sector.

Claim 8

The system of claim 2, wherein the correction checker unit comprises a segmentation compensation circuit which outputs a compensated error pattern, and wherein the timing control gate receives the compensated error patterns.

Claim 9

The system of claim 2, wherein the timing control gate has a first input terminal which receives the error patterns and a second input terminal which turns on the timing control gate only when the error patterns being applied to the timing control gate affect a CRC byte loaded into the register.

Claim 10

The system of claim 2, wherein each stage of the correction checker unit includes a register content checking gate connected to the output terminal of the register of the stage.

Claim 11

The system of claim 8, wherein the correction checker unit further comprises an all-byte zero checking gate to which the register content checking gates of all stages are connected, and which produces a predetermined signal when the correction checker unit is unable to verify correction by the correction unit.

Claim 12

An error correction method for rotating magnetic media, the error correction method comprising: generating CRC check remainder bytes by: a) using input data from a read sector to obtain regenerated CRC bytes for the read sector, and (b) adding the regenerated CRC bytes to incoming CRC bytes of the read sector; generating error patterns for correcting errors in the read sector; using the CRC check remainder bytes and the error patterns for confirming that the error patterns accurately correct the errors in the read sector by: (1) loading a predetermined number of the CRC check remainder bytes into a corresponding number of registers; (2) for each of a plurality of error patterns of the sector, adding the error pattern to the register having its CRC check remainder byte affected by the error pattern; (3) determining whether the contents of any of the registers indicates inaccurate correction of the errors.

Claim 13

An error correction method for rotating magnetic media, the error correction method comprising: generating CRC check remainder bytes by: a) using input data from a read sector to obtain regenerated CRC bytes for the read sector, and (b) adding the regenerated CRC bytes to incoming CRC bytes of the read sector; generating error patterns for correcting errors in the read sector; using the CRC check remainder bytes and the error patterns for confirming that the error patterns accurately correct the errors in the read sector by: (1) loading a predetermined number of the CRC check remainder bytes into a corresponding number of registers; (2) for each of a plurality of error patterns of the sector, adding the error pattern to the register having its CRC check remainder byte affected by the error pattern; (3) determining whether the contents of any of the registers indicates inaccurate correction of the errors.

Claim 14

The method of claim 10, wherein error patterns for ECC bytes in the sector are not included in step (2).

Claim 15

The method of claim 10, wherein a segmentation compensated error pattern is added to the register when the error pattern is for data in the sector.

Claim 16

The method of claim 10, wherein step (1) comprises shifting the predetermined number of the CRC check remainder bytes through a plurality of registers connected to function as a shift register.

Claim 17

The method of claim 10, wherein step (3) comprises a logical operation upon the contents of each of the registers.

Claim 18

The method of claim 10, wherein step (2) is executed during a clocking of bytes of the sector, and wherein during a clocking of data of the sector the registers are clocked with feedback multiplication at predetermined clocking intervals.

Claim 19

The method of claim 15, wherein the sector is clocked to process ECC bytes first, followed by CRC bytes, followed by data bytes.