Method and device for providing video instant replay in a picture-in-picture

Claim 3

The method as claimed in claim 1, wherein the step of re-displaying displays the fields that have been decimated at a user selected re-display rate.

Claim 4

The method as claimed in claim 2, wherein the step of re-displaying repeatedly re-displaying a decimated field to achieve the user selected re-display rate.

Claim 5

The method in accordance with claim 1, wherein the step of decimating is performed on only the selected plurality of non-consecutive fields.

Claim 6

The method as claimed in claim 2, further including the step of: selecting a single step mode wherein the re-display rate is variable for each field being re-display and the user controls the re-display rate for each field.

Claim 7

The method as claimed in claim 1, wherein the step of re-displaying repeatedly re-displays the sequence of stored fields until a user selects to stop the step of re-displaying.

Claim 8

The method as claimed in claim 1, wherein the step of re-displaying re-displays the sequence of fields in an order which is reverse to the order the fields were acquired.

Claim 13

A television receiver including a device for providing picture-in-picture (PIP) instant replay comprising: means for receiving video field information in the form of a string of consecutive fields; an A/D converter coupled to the means for receiving, for converting the video field information into digital form; a write processor coupled to the A/D converter for decimating in time the field information; a selector for selecting a plurality of non-consecutive fields form the string of consecutive fields for display in the PIP; a field counter for receiving information regarding the fields selected to be displayed and a specified length of time each of the fields selected is to be displayed; a memory; a write processor interface for storing to the memory; under control of the field counter, the fields selected; a multiplexer for addressing the locations in the memory to receive the fields selected; a write address counter coupled to the multiplexer and the write processor interface for maintaining a count of the fields selected stored in the memory and for providing this count to the multiplexer; an input coupled to the field counter for receiving a display command, which display command indicates the length of time each field selected is to be displayed; a read processor, coupled to the input, for requesting display of the fields selected and stored; a read processor interface coupled to the memory and the read processor for reading the stored fields from the memory; and a read address counter for requesting from the multiplexer the address location for the next stored field to be displayed, and wherein the field counter controls the read address counter such that each field is displayed for the specified length of time.

Claim 14

A television receiver including a device for providing picture-in-picture (PIP) instant replay comprising: means for receiving video field information in the form of a string of consecutive fields; an A/D converter coupled to the means for receiving, for converting the video field information into digital form; a write processor coupled to the A/D converter for decimating in time the field information; a selector for selecting a plurality of non-consecutive fields form the string of consecutive fields for display in the PIP; a field counter for receiving information regarding the fields selected to be displayed and a specified length of time each of the fields selected is to be displayed; a memory; a write processor interface for storing to the memory; under control of the field counter, the fields selected; a multiplexer for addressing the locations in the memory to receive the fields selected; a write address counter coupled to the multiplexer and the write processor interface for maintaining a count of the fields selected stored in the memory and for providing this count to the multiplexer; an input coupled to the field counter for receiving a display command, which display command indicates the length of time each field selected is to be displayed; a read processor, coupled to the input, for requesting display of the fields selected and stored; a read processor interface coupled to the memory and the read processor for reading the stored fields from the memory; and a read address counter for requesting from the multiplexer the address location for the next stored field to be displayed, and wherein the field counter controls the read address counter such that each field is displayed for the specified length of time.

Claim 17

A device as claimed in claim 11, further including a field counter for counting the fields of the string of consecutive fields and for providing a count to the write processor which indicates which fields are the selected fields.

Claim 18

A device as claimed in claim 11, further including an input for receiving re-display rate information which indicates the length of time each stored field is re-display and wherein the read processor does not read a next field from the memory until expiration of the length of time and the PIP display displays each field for the length of time.

Claim 19

A device as claimed in claim 11, wherein the memory is a DRAM.

Claim 20

A device as claimed in claim 12, wherein the field counter is a five bit field counter wherein a least significant bit is used during non-instant replay picture-in-picture interlace correction.

Claim 21

A device as claimed in claim 11, wherein the read processor reads each stored frame repeatedly until a user selects to view a next stored frame.

Claim 22

A device as claimed in claim 13, wherein the read processor reads each stored field repeatedly for the length of time determined by the re-display rate information and the PIP display re-displays each stored field repeatedly for the length of time determined by the re-displays rate information.

Claim 23

A device as claimed in claim 11, wherein the read processor reads the sequence of stored fields in an order which is reverse to the order in which the fields were acquired and wherein the PIP display re-displays the stored fields in the reverse order.

Claim 24

A device as claimed in claim 13, wherein the field counter keeps count for determining the expiration of the length of time.

Claim 25

A device as claimed in claim 17, wherein the field counter counts vertical sync signals of the fields read by the read processor to determine the expiration of the length of time.

Claim 26

A television receiver including a device for providing video instant replay of a sequence of fields, previously displayed on the television receiver, in a picture-in-picture (PIP) display of the television receiver, comprising: a memory; an acquiring device for acquiring each field of a string of consecutive video fields and for displaying on the television receiver the string of consecutive video fields; a decimator for decimating in time each said field of said string of consecutive video fields; a selector for selecting a plurality of non-consecutive fields of said string of consecutive fields to be stored in the memory for re-display in the PIP; a write processor for writing the selected plurality of non-consecutive decimated fields in the memory; and a read processor for reading the stored fields from the memory in sequence and for providing the sequence to the PIP display for re-display.

Claim 27

A television receiver including a device for providing video instant replay of a sequence of fields, previously displayed on the television receiver, in a picture-in-picture (PIP) display of the television receiver, comprising: a memory; an acquiring device for acquiring each field of a string of consecutive video fields and for displaying on the television receiver the string of consecutive video fields; a decimator for decimating in time each said field of said string of consecutive video fields; a selector for selecting a plurality of non-consecutive fields of said string of consecutive fields to be stored in the memory for re-display in the PIP; a write processor for writing the selected plurality of non-consecutive decimated fields in the memory; and a read processor for reading the stored fields from the memory in sequence and for providing the sequence to the PIP display for re-display.