One cycle control of bipolar switching power amplifiers

Claim 2

An improvement in a bipolar switching amplifier having a controlled switched bipolar variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled bipolar variable, v p , over a single switched cycle; a comparator circuit coupled to said averaging circuit for comparing said average of said controlled bipolar variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled bipolar variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to or proportional to said reference signal v ref , and an offset circuit for adding a predetermined offset voltage v os , to said average of said controlled bipolar variable v p , to couple a sum of said voltage to said comparator circuit to thereby avoid subharmonic oscillations of said bipolar switching amplifier, whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 3

The improvement of claim 1 wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit wherein said comparator circuit comprises: a comparator having one input coupled to said integrator and a second input coupled to said reference signal, v ref ; and a clock-driven flip-flop being coupled to and reset by said comparator, said flip-flop providing a driving signal to said switching amplifier; wherein said bipolar switching amplifier further comprises a driver and a pair of complementarily driven switches coupled to said driver, said flip-flop having an output coupled to said driver to complementarily drive said switches of said bipolar switching amplifier.

Claim 4

An improvement in a switching amplifier having a controlled switched variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to or proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit wherein said comparator circuit comprises: a comparator having one input coupled to said integrator and a second input coupled to said reference signal, v ref ; and a clock-driven flip-flop being coupled to and reset by said comparator, said flip-flop providing a driving signal to said switching amplifier; wherein said flip-flop has an output coupled to said integrator to reset said integrator to zero when the average value of said switched variable, v p , reaches said control reference signal, v ref ; wherein said comparator circuit further comprises a narrow pulse generator and said flip-flop is coupled to said integrator through said narrow pulse generator so that said narrow pulse generator, being triggered by said flip-flop, quickly resets said integrator to zero when the average value of said switched variable, v p , reaches said control reference signal, v ref , whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 5

An improvement in a switching amplifier having a controlled switched variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to or proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit wherein said comparator circuit comprises: a comparator having one input coupled to said integrator and a second input coupled to said reference signal, v ref ; and a clock-driven flip-flop being coupled to and reset by said comparator, said flip-flop providing a driving signal to said switching amplifier; wherein said flip-flop has an output coupled to said integrator to reset said integrator to zero when the average value of said switched variable, v p , reaches said control reference signal, v ref ; wherein said comparator circuit further comprises a narrow pulse generator and said flip-flop is coupled to said integrator through said narrow pulse generator so that said narrow pulse generator, being triggered by said flip-flop, quickly resets said integrator to zero when the average value of said switched variable, v p , reaches said control reference signal, v ref , whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 6

The improvement of claim 3 further comprising an offset circuit for adding a predetermined offset voltage, v os , to said average of said controlled variable, v p , to couple a sum of said voltage to said comparator circuit to thereby avoid subharmonic oscillations of said switching amplifier.

Claim 7

An improvement in a switching amplifier having a controlled switched variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to or proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit; and further comprising an offset circuit for adding a predetermined offset voltage, v os , to said average of said controlled variable, v p , to couple a sum of said voltage to said comparator circuit to thereby avoid subharmonic oscillations of said switching amplifier, whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 8

An improvement in a switching amplifier having a controlled switched variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to or proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit; and further comprising an offset circuit for adding a predetermined offset voltage, v os , to said average of said controlled variable, v p , to couple a sum of said voltage to said comparator circuit to thereby avoid subharmonic oscillations of said switching amplifier, whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 9

The improvement of claim 5 further comprising a fast zero reset circuit for resetting said integrator during a time interval smaller than said switching time of the switches in said switching amplifier.

Claim 10

An improvement in a switching amplifier having a controlled switched variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to or proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit wherein said comparator circuit comprises: a comparator having one input coupled to said integrator and a second input coupled to said reference signal, v ref ; and a clock-driven flip-flop being coupled to and reset by said comparator, said flip-flop providing a driving signal to said switching amplifier; wherein said switching amplifier further comprises a driver and a pair of complementarily driven switches coupled to said driver, said flip-flop having an output coupled to said driver to complementarily drive said switches of said switching amplifier; and further comprising an offset circuit for adding a predetermined offset voltage, v os , to said average of said controlled variable, v p , to couple a sum of said voltage to said comparator circuit to thereby avoid subharmonic oscillations of said switching amplifier.

Claim 11

An improvement in a switching amplifier having a controlled switched variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to or proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit wherein said comparator circuit comprises: a comparator having one input coupled to said integrator and a second input coupled to said reference signal, v ref ; and a clock-driven flip-flop being coupled to and reset by said comparator, said flip-flop providing a driving signal to said switching amplifier; wherein said switching amplifier further comprises a driver and a pair of complementarily driven switches coupled to said driver, said flip-flop having an output coupled to said driver to complementarily drive said switches of said switching amplifier; and further comprising an offset circuit for adding a predetermined offset voltage, v os , to said average of said controlled variable, v p , to couple a sum of said voltage to said comparator circuit to thereby avoid subharmonic oscillations of said switching amplifier.

Claim 12

The improvement of claim 5 wherein said offset voltage, v os , is chosen to have a magnitude of a predetermined value in relationship to an DC power supply to said switching amplifier so that transients caused by perturbations on said average of said controlled variable, v p , are forced to zero within one switching cycle.

Claim 13

The improvement of claim 8 wherein said DC power supply provided to said switching amplifier is a half-wave bridge or full wave bridge, and wherein said offset voltage v os is equal to half the DC voltage across said half bridge or full bridge of said DC power supply.

Claim 14

An improvement in a switching amplifier having a controlled switchable variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit wherein said comparator circuit comprises: a comparator having one input coupled to said integrator and a second input coupled to said reference signal, v ref ; and a clock-driven flip-flop being coupled to and reset by said comparator, said flip-flop providing a driving signal to said switching amplifier; wherein said flip-flop has an output coupled to said integer to reset said integrator to zero when the average value of said switched variable, v p , reaches said control reference signal, v ref ; further comprising a fast zero reset circuit of resetting said integrator during a time interval at least an order of magnitude smaller than said switching time of the switches of the said switching amplifier.

Claim 15

An improvement in a switching amplifier having a controlled switchable variable, v p , as a switched voltage signal comprising: an averaging circuit for generating an average value of said controlled variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said switching amplifier to switch said amplifier when said average of said controlled variable v p is equal to proportional to said reference signal v ref , wherein said averaging circuit is an integrator, said integrator being reset by output from said comparator circuit wherein said comparator circuit comprises: a comparator having one input coupled to said integrator and a second input coupled to said reference signal, v ref ; and a clock-driven flip-flop being coupled to and reset by said comparator, said flip-flop providing a driving signal to said switching amplifier; wherein said flip-flop has an output coupled to said integer to reset said integrator to zero when the average value of said switched variable, v p , reaches said control reference signal, v ref ; further comprising a fast zero reset circuit of resetting said integrator during a time interval at least an order of magnitude smaller than said switching time of the switches of the said switching amplifier.

Claim 16

The improvement of claim 10 wherein said fast zero reset circuit comprises: a pair of integrating capacitors coupled with said integrator; a switching network coupled to said capacitors for coupling said pair of capacitors to said integrator in one of two configurations; and a logic circuit for controlling said switching network to selectively couple said capacitors in one of said two configurations to selectively discharge those of said two capacitors coupled to said integrator.

Claim 17

The improvement of claim 11 where said switching network comprises a pair of in-line switches and a pair of parallel switches for discharging said pair of integrating capacitors; and wherein said logic circuit drives said in-line switches and parallel switches in alternative pairs to alternately discharge one of said pair of capacitors and to couple said other one of said pair of capacitors in circuit with said integrator on each switching cycle.

Claim 18

The improvement of claim 11 where said switching network cyclically couples one of said two capacitors alternatively in forward and then in reverse parallel circuit with said other one of said two capacitors to selectively discharge said other one of said two capacitors whenever said cyclically coupled capacitor is switched.

Claim 25

An improvement in a bipolar switching amplifier having a controlled switched bipolar variable, v p , as a bipolar switched voltage signal comprising: an averaging circuit for generating an average value of said controlled bipolar variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled bipolar variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled bipolar variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said bipolar switching amplifier to switch said amplifier when said average of said controlled bipolar variable v p is equal to or proportional to said reference signal v ref , wherein said comparator circuit further comprises a narrow pulse generator coupled to said averaging circuit so that said narrow pulse generator quickly resets said averaging circuit to zero when the average value of said switched bipolar variable, v p , reaches said control reference signal, v ref ; whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 26

An improvement in a bipolar switching amplifier having a controlled switched bipolar variable, v p , as a bipolar switched voltage signal comprising: an averaging circuit for generating an average value of said controlled bipolar variable, v p , over a single switched cycle; and a comparator circuit coupled to said averaging circuit for comparing said average of said controlled bipolar variable, v p , to a reference signal, v ref , to be amplified, said comparator circuit generating an output signal when said average of said controlled bipolar variable, v p , equals said reference signal, v ref , said comparator circuit being coupled to said bipolar switching amplifier to switch said amplifier when said average of said controlled bipolar variable v p is equal to or proportional to said reference signal v ref , wherein said comparator circuit further comprises a narrow pulse generator coupled to said averaging circuit so that said narrow pulse generator quickly resets said averaging circuit to zero when the average value of said switched bipolar variable, v p , reaches said control reference signal, v ref ; whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 27

An improvement in a method of controlling a bipolar switching amplifier having a controlled switched bipolar variable, v p , as a switched voltage signal comprising: generating an average value of said controlled bipolar variable, v p , over a single switched cycle; and comparing said average of said controlled bipolar variable, v p , to a reference signal, v ref , to be amplified; generating an output signal when said average of said controlled bipolar variable, v p , equals said reference signal, v ref , switching said bipolar switching amplifier when said average of said controlled bipolar variable v p is equal to or proportional to said reference signal v ref , and quickly resetting said averaging circuit to zero with a narrow pulse generator when the average value of said switched bipolar variable, v p , reaches said control reference signal, v ref ; whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.

Claim 28

An improvement in a method of controlling a bipolar switching amplifier having a controlled switched bipolar variable, v p , as a switched voltage signal comprising: generating an average value of said controlled bipolar variable, v p , over a single switched cycle; and comparing said average of said controlled bipolar variable, v p , to a reference signal, v ref , to be amplified; generating an output signal when said average of said controlled bipolar variable, v p , equals said reference signal, v ref , switching said bipolar switching amplifier when said average of said controlled bipolar variable v p is equal to or proportional to said reference signal v ref , and quickly resetting said averaging circuit to zero with a narrow pulse generator when the average value of said switched bipolar variable, v p , reaches said control reference signal, v ref ; whereby DC-to-AC conversion is obtained with very linear gain, no crossover distortion, low harmonic distortion, excellent power source ripple rejection capability, large dynamic range, and wide bandwidth.