US5606540A
Expired / Lapsed
US
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Digital signal reproducing apparatus
Assignee: Pioneer Corp
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Filing: 1995-12-29
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Granted: 1997-02-25
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Expires: 2015-12-29
Abstract
Abstract A digital signal reproducing apparatus which is capable of suppressing jitter in a reproduced clock signal, even if recording information is highly densely recorded on a recording medium, to provide reproduced digital signals with a low error ratio. A signal read from the recording medium is sampled at the timing of the reproduced clock signal, to produce a sequence of sampled values. The phase of the reproduced clock signal is corrected based on a sampled value derived in an edge section of a recorded signal which occurs when recording signal portions having a run length longer than a predetermined length are consecutively read, among sample value series obtained by sampling the read signal, which is read-out from the recording medium, at the timing of the reproduced clock signal.
Inventors
- 👤 Hideki Hayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 15:28
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/22; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
165 words
A digital signal reproducing apparatus for reproducing a digital signal based on a read signal read from a recording medium on which signals with limited run lengths are recorded, comprising: an A/D convertor for sequentially sampling said read signal at timing of a reproduced clock signal to convert said read signal to sampled values; decoding means for decoding said reproduced digital signal based on said sampled values; long run length detecting means for detecting an edge section of said recorded signal in a section in which sampled values corresponding to a recorded signal having said run length longer than a predetermined length are successively read, based on said sampled values; phase error generating means for extracting a sampled value derived in said edge section from said sampled values and generating a phase error signal corresponding to the extracted sampled value; and clock generating means for generating a clock signal having a phase which changes based on said phase error signal as said reproduced clock signal.
Claim 2
Dependent Claim
165 words
A digital signal reproducing apparatus for reproducing a digital signal based on a read signal read from a recording medium on which signals with limited run lengths are recorded, comprising: an A/D convertor for sequentially sampling said read signal at timing of a reproduced clock signal to convert said read signal to sampled values; decoding means for decoding said reproduced digital signal based on said sampled values; long run length detecting means for detecting an edge section of said recorded signal in a section in which sampled values corresponding to a recorded signal having said run length longer than a predetermined length are successively read, based on said sampled values; phase error generating means for extracting a sampled value derived in said edge section from said sampled values and generating a phase error signal corresponding to the extracted sampled value; and clock generating means for generating a clock signal having a phase which changes based on said phase error signal as said reproduced clock signal.
Claim 3
Dependent Claim
34 words
A digital signal reproducing apparatus according to claim 1, wherein said long run length detecting means detects a section in which said sampled values continuously increase or continuously decrease over a predetermined time period.
Claim 4
Dependent Claim
29 words
A digital signal reproducing apparatus according to claim 1, wherein said long run length detecting means detects a section in which said sampled value changes beyond a predetermined threshold.
Claim 5
Dependent Claim
22 words
A digital signal reproducing apparatus according to claim 1, wherein said predetermined length is the shortest run length in said recorded signal.
Claim 6
Dependent Claim
36 words
A digital signal reproducing apparatus according to claim 1, wherein said phase error generating means generates a signal corresponding to a sampled value at a middle point of said edge section as said phase error signal.
Claim 7
Dependent Claim
45 words
A digital signal reproducing apparatus according to claim 1, wherein said phase error detecting means generates a signal corresponding to an average value of sampled values at points previous to and subsequent to a middle point of said edge section as said phase error signal.
Claim 8
Dependent Claim
165 words
A digital signal reproducing apparatus for reproducing a digital signal based on a read signal read from a recording medium on which signals with limited run lengths are recorded, comprising: an A/D convertor for sequentially sampling said read signal at timing of a reproduced clock signal to convert said read signal to sampled values; decoding means for decoding said reproduced digital signal based on said sampled values; long run length detecting means for detecting an edge section of said recorded signal in a section in which sampled values corresponding to a recorded signal having said run length longer than a predetermined length are successively read, based on said digital signal; phase error generating means for extracting a sampled value derived in said edge section from said sampled values and generating a phase error signal corresponding to the extracted sampled value; and clock generating means for generating a clock signal having a phase which changes based on said phase error signal as said reproduced clock signal.
Claim 9
Dependent Claim
165 words
A digital signal reproducing apparatus for reproducing a digital signal based on a read signal read from a recording medium on which signals with limited run lengths are recorded, comprising: an A/D convertor for sequentially sampling said read signal at timing of a reproduced clock signal to convert said read signal to sampled values; decoding means for decoding said reproduced digital signal based on said sampled values; long run length detecting means for detecting an edge section of said recorded signal in a section in which sampled values corresponding to a recorded signal having said run length longer than a predetermined length are successively read, based on said digital signal; phase error generating means for extracting a sampled value derived in said edge section from said sampled values and generating a phase error signal corresponding to the extracted sampled value; and clock generating means for generating a clock signal having a phase which changes based on said phase error signal as said reproduced clock signal.
Claim 10
Dependent Claim
22 words
A digital signal reproducing apparatus according to claim 7, wherein said predetermined length is the shortest run length in said recorded signal.
Claim 11
Dependent Claim
36 words
A digital signal reproducing apparatus according to claim 7, wherein said phase error generating means generates a signal corresponding to a sampled value at a middle point of said edge section as said phase error signal.
Claim 12
Dependent Claim
45 words
A digital signal reproducing apparatus according to claim 7, wherein said phase error detecting means generates a signal corresponding to an average value of sampled values at points previous to and subsequent to a middle point of said edge section as said phase error signal.
References Cited (Backward Citations)
US5056116A
Cited
US5517476A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-02-25 | 2000-08-26 | 2001-02-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-02-25 | 2004-08-26 | 2005-02-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-02-25 | 2008-08-26 | 2009-02-25 | $7700.00 | Window Closed / Lapsed |