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US5602872A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and system for controlling an adaptive, blind, fractionally spaced equalizer

Assignee: Texas Instruments Inc
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Filing: 1994-12-19
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Granted: 1997-02-11
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Expires: 2014-12-19
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Abstract

Abstract The present invention includes a method and system for controlling an equalizer equalizing data transmitted a communications channel which is oversampled at an oversampling rate of M. The method of the present invention includes the steps of initializing a plurality of data pointers and a first buffer stored in an input memory (22); generating a buffer full flag in response to filling the first buffer with a pre-determined number of data samples; initializing a counter (28) in response to the buffer full flag, the counter (28) generating an enable signal every M cycles; equalizing a portion of the pre-determined number of data samples in response to the enabling signal using an equalizer (20), where the portion of the pre-determined number of data samples is located using the plurality of data pointers; and adjusting the plurality of data pointers in response to the equalizing step using an FSE controller (24).

Inventors

  • 👤 Michael S. Andrews

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 05:27
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/03; H04L25/03006; H04L25/03012; H04L25/03019; H04L25/03038; H04L25/03044; H04L25/0305

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 126 words
A method of controlling an equalizer, said equalizer coupled to a data channel, data transmitted through said data channel being oversampled at oversampling rate M, comprising steps of: initializing a plurality of data pointers and a first buffer stored in an input memory; generating a buffer full flag in response to filling said first buffer with a pre-determined number of data samples; initializing a counter in response to said buffer full flag, said counter generating an enable signal every M cycles; equalizing a portion of said pre-determined number of data samples in response to said enabling signal, said portion of said pre-determined number of data samples located using said plurality of data pointers; and adjusting said plurality of data pointers in response to said equalizing step.
Claim 2
Independent Claim 126 words
A method of controlling an equalizer, said equalizer coupled to a data channel, data transmitted through said data channel being oversampled at oversampling rate M, comprising steps of: initializing a plurality of data pointers and a first buffer stored in an input memory; generating a buffer full flag in response to filling said first buffer with a pre-determined number of data samples; initializing a counter in response to said buffer full flag, said counter generating an enable signal every M cycles; equalizing a portion of said pre-determined number of data samples in response to said enabling signal, said portion of said pre-determined number of data samples located using said plurality of data pointers; and adjusting said plurality of data pointers in response to said equalizing step.
Claim 3
Independent Claim 133 words
A method of controlling an equalizer, said equalizer coupled to a data channel, data transmitted through said data channel being oversampled at oversampling rate M, said equalizer including an adaptive filter, and said adaptive filter having a filter length N, comprising steps of: initializing a plurality of data pointers and a first buffer stored in an input memory; generating a buffer full flag in response to filling said first buffer with N+M-1 data samples; initializing a counter in response to said buffer full flag, said counter generating an enable signal every M cycles; equalizing N of said N+M-1 data samples in response to said enabling signal, said N of said N+M-1 data samples located using said plurality of data pointers; and adjusting said plurality of data pointers in response to said equalizing step.
Claim 4
Independent Claim 133 words
A method of controlling an equalizer, said equalizer coupled to a data channel, data transmitted through said data channel being oversampled at oversampling rate M, said equalizer including an adaptive filter, and said adaptive filter having a filter length N, comprising steps of: initializing a plurality of data pointers and a first buffer stored in an input memory; generating a buffer full flag in response to filling said first buffer with N+M-1 data samples; initializing a counter in response to said buffer full flag, said counter generating an enable signal every M cycles; equalizing N of said N+M-1 data samples in response to said enabling signal, said N of said N+M-1 data samples located using said plurality of data pointers; and adjusting said plurality of data pointers in response to said equalizing step.
Claim 5
Independent Claim 141 words
A method of controlling an equalizer, said equalizer coupled to a data channel, data transmitted through said data channel being oversampled at oversampling rate M, said equalizer including an adaptive filter, and said adaptive filter having a filter length N, comprising steps of: initializing a plurality of data pointers and a first buffer stored in an input memory; generating a buffer full flag in response to filling said first buffer with N+M-1 data samples; initializing a counter in response to said buffer full flag, said counter generating an enable signal every M cycles; equalizing N of said N+M-1 data samples in response to said enabling signal, said N of said N+M-1 data samples located using said plurality of data pointers; generating filtered output data in response to said equalizing step; and adjusting said data pointers in response to said equalizing step.
Claim 6
Independent Claim 141 words
A method of controlling an equalizer, said equalizer coupled to a data channel, data transmitted through said data channel being oversampled at oversampling rate M, said equalizer including an adaptive filter, and said adaptive filter having a filter length N, comprising steps of: initializing a plurality of data pointers and a first buffer stored in an input memory; generating a buffer full flag in response to filling said first buffer with N+M-1 data samples; initializing a counter in response to said buffer full flag, said counter generating an enable signal every M cycles; equalizing N of said N+M-1 data samples in response to said enabling signal, said N of said N+M-1 data samples located using said plurality of data pointers; generating filtered output data in response to said equalizing step; and adjusting said data pointers in response to said equalizing step.
Claim 7
Dependent Claim 96 words
The method of claim 3, wherein said adjusting step includes the steps of: determining a first argument of an element of said filtered output data which has a maximum value; determining in response to said maximum value being below a predetermined threshold a second argument of an element of said filtered output data with a minimum value; performing a modulus operation between said first argument or said second argument and M, thereby generating an adjustment factor, k; determining a pointer offset using said adjustment factor; and adjusting said plurality of data pointers using said pointer offset.
Claim 8
Dependent Claim 30 words
The method of claim 3 wherein said step of adjusting said plurality of data pointers includes the steps of adjusting a data read pointer and adjusting a data write pointer.
Claim 9
Independent Claim 127 words
An apparatus for controlling an equalizer, said equalizer used to equalize a data channel, transmitted data from said data channel being oversampled at an oversampling rate M, comprising: first means for generating a buffer full flag in response to storing a predetermined number of data samples into a first buffer; second means responsive to said buffer full flag for generating an enable signal every M cycles; said equalizer responsive to said enable signal for equalizing a portion of said pre-determined number of data samples, said portion of said pre-determined number of data samples determined using a plurality of data pointers into said first buffer; third means responsive to said enable signal for adjusting said plurality of data pointers in response to filtered output data from said equalizer.
Claim 10
Independent Claim 127 words
An apparatus for controlling an equalizer, said equalizer used to equalize a data channel, transmitted data from said data channel being oversampled at an oversampling rate M, comprising: first means for generating a buffer full flag in response to storing a predetermined number of data samples into a first buffer; second means responsive to said buffer full flag for generating an enable signal every M cycles; said equalizer responsive to said enable signal for equalizing a portion of said pre-determined number of data samples, said portion of said pre-determined number of data samples determined using a plurality of data pointers into said first buffer; third means responsive to said enable signal for adjusting said plurality of data pointers in response to filtered output data from said equalizer.
Claim 11
Independent Claim 134 words
An apparatus for controlling an equalizer, said equalizer used to equalize a data channel, transmitted data from said data channel being oversampled at an oversampling rate M, said equalizer including an adaptive filter having a filter length N, comprising: first means for generating a buffer full flag in response to storing N+M-1 data samples into a first buffer; second means responsive to said buffer full flag for generating an enable signal every M cycles; said equalizer responsive to said enable signal for equalizing N of said N+M-1 data samples, said N of said N+M-1 data samples determined using a plurality of data pointers into said first buffer; third means responsive to said enable signal for adjusting said plurality of data pointers in response to filtered output data from said adaptive filter in said equalizer.
Claim 12
Independent Claim 134 words
An apparatus for controlling an equalizer, said equalizer used to equalize a data channel, transmitted data from said data channel being oversampled at an oversampling rate M, said equalizer including an adaptive filter having a filter length N, comprising: first means for generating a buffer full flag in response to storing N+M-1 data samples into a first buffer; second means responsive to said buffer full flag for generating an enable signal every M cycles; said equalizer responsive to said enable signal for equalizing N of said N+M-1 data samples, said N of said N+M-1 data samples determined using a plurality of data pointers into said first buffer; third means responsive to said enable signal for adjusting said plurality of data pointers in response to filtered output data from said adaptive filter in said equalizer.

References Cited (Backward Citations)

US4607377A Cited
US5283813A Cited
US5414732A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-02-11 2000-08-12 2001-02-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-02-11 2004-08-12 2005-02-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-02-11 2008-08-12 2009-02-11 $7700.00 Window Closed / Lapsed

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