Method and circuit to improve output voltage regulation and noise rejection of a power factor control stage

Claim 5

The method recited in claim 2, wherein said step of multiplying comprises: receiving a signal for setting the scaling factor for said step of multiplication, said signal setting the scaling factor being generated by the steps of: sensing an output voltage across the load coupled to the power factor control stage; comparing the sensed output voltage to a reference voltage; and providing an error signal as said signal for setting the scaling factor.

Claim 6

The method recited in claim 3, further comprising repetitively sampling said error signal for predetermined periods of time and providing a sampled signal as said signal for setting the scaling factor.

Claim 7

The method recited in claim 1, wherein said step of generating the voltage reference comprises using a phase-locked loop circuit.

Claim 8

The method recited in claim 1, wherein said step of generating the voltage reference signal comprises generating said voltage reference signal from an alternating current signal derived from the alternating current line prior to rectification.

Claim 9

The method recited in claim 2, wherein said step of producing a first signal comprises using a phase-locked loop circuit and said step of rectifying comprises using a precision rectifier stage.

Claim 10

The method recited in claim 1, wherein the predetermined phase relationship of the line current to the line voltage is one of in-phase, leading or lagging.

Claim 11

A circuit for improving output voltage regulation and noise rejection of a power factor control stage providing power to a load comprising: a circuit for generating a voltage reference signal that is in phase lock with an input alternating current power line signal but is independent of voltage excursions of the alternating current line signal; and a control circuit receiving said voltage reference signal for controlling an electronic switch coupled to an input line providing power to the load, said electronic switch being pulsed on and off by said control circuit to force the current in the input line providing power to the load to follow said voltage reference signal, whereby the input alternating current line current is in a substantially constant predetermined phase relationship with the input alternating current line voltage.

Claim 12

A circuit for improving output voltage regulation and noise rejection of a power factor control stage providing power to a load comprising: a circuit for generating a voltage reference signal that is in phase lock with an input alternating current power line signal but is independent of voltage excursions of the alternating current line signal; and a control circuit receiving said voltage reference signal for controlling an electronic switch coupled to an input line providing power to the load, said electronic switch being pulsed on and off by said control circuit to force the current in the input line providing power to the load to follow said voltage reference signal, whereby the input alternating current line current is in a substantially constant predetermined phase relationship with the input alternating current line voltage.

Claim 13

A circuit for improving output voltage regulation and noise rejection of a power factor control stage providing power to a load comprising: a circuit for generating a voltage reference signal that is in phase lock with an input alternating current power line signal but is independent of voltage excursions of the alternating current line signal; the circuit for generating a voltage reference signal comprising: a phase-locking circuit for producing a first signal that is in phase lock with the input alternating current line signal, a rectifier for rectifying the first signal to produce a second signal, and a multiplier for multiplying said second signal by a scaling factor to produce said voltage reference signal; and a control circuit receiving said voltage reference signal for controlling an electronic switch coupled to an input line providing power to the load, said electronic switch being pulsed on and off by said control circuit to force the current in the input line providing power to the load to follow said voltage reference signal, whereby the input alternating current line current is in a substantially constant predetermined phase relationship with the input alternating current line voltage.

Claim 14

A circuit for improving output voltage regulation and noise rejection of a power factor control stage providing power to a load comprising: a circuit for generating a voltage reference signal that is in phase lock with an input alternating current power line signal but is independent of voltage excursions of the alternating current line signal; the circuit for generating a voltage reference signal comprising: a phase-locking circuit for producing a first signal that is in phase lock with the input alternating current line signal, a rectifier for rectifying the first signal to produce a second signal, and a multiplier for multiplying said second signal by a scaling factor to produce said voltage reference signal; and a control circuit receiving said voltage reference signal for controlling an electronic switch coupled to an input line providing power to the load, said electronic switch being pulsed on and off by said control circuit to force the current in the input line providing power to the load to follow said voltage reference signal, whereby the input alternating current line current is in a substantially constant predetermined phase relationship with the input alternating current line voltage.

Claim 15

The circuit recited in claim 10, wherein said multiplier comprises: a multiplier having an input receiving a signal for setting the scaling factor of said multiplier, said signal setting the scaling factor being generated by a circuit comprising: a sensor sensing an output voltage across the load coupled to the power factor control stage; a comparator for comparing the output voltage to a reference voltage and providing an error signal to said multiplier as said signal for setting the scaling factor.

Claim 16

The circuit recited in claim 11, further comprising a sample and hold circuit coupled to the output of said comparator for repetitively sampling said error signal for predetermined periods of time, the output of said sample and hold circuit comprising a sampled signal coupled to said multiplier for setting the scaling factor.

Claim 17

The circuit recited in claim 9, wherein said circuit for generating the voltage reference comprises a phase-locked loop circuit.

Claim 18

The circuit recited in claim 9, wherein said circuit for generating the voltage reference signal receives an alternating current signal derived from the alternating current line prior to rectification.

Claim 19

The circuit recited in claim 10, wherein said phase-locking circuit comprises a phase-locked loop and said rectifier comprises a precision rectifier stage.

Claim 20

The circuit recited in claim 9, wherein the predetermined phase relationship of the line current to the line voltage is one of in-phase, leading or lagging.