US5598429A
Expired / Lapsed
US
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Multi-level correlation system for synchronization detection in high noise and multi-path environments
Assignee: Individual
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Filing: 1994-07-15
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Granted: 1997-01-28
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Expires: 2014-07-15
Abstract
Abstract A multi-level correlation technique and apparatus for detecting symbol and data frame synchronization in high noise and multi-path environments, wherein received signals are correlated with known pseudorandom noise (PN) or other known codes at the base level and the base level correlation results are in turn correlated with PN or other known codes at the next higher level, such that the top level of correlation includes all lower levels of encoding in the complete synchronization pattern. In a two level implementation, the base level codes define symbols while the top level code defines the synchronization pattern in terms of the base level symbols. Correlation hardware is minimized while processing gain is maximized for enhancing low signal to noise levels over a long synchronization pattern. Additionally, precise ranging is facilitated because the top level correlation result covers the entire synchronization pattern.
Inventors
- 👤 Kenneth E. Marshall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 06:13
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/69; H04B1/707; H04B1/7073; H04B1/7075; H04B1/70751; H04B1/70752; H04B1/70755; H04B1/7077; H04B1/70775; H04B1/708
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
177 words
A method for two level correlation and detection of a synchronization pattern comprising the steps of: a. correlating a down converted, received signal for coincidence with two expected unique symbol chip sequences, to generate two symbol correlator outputs; b. sampling and converting the two symbol correlator outputs into digital format; c. finding the binary difference of the two symbol correlator outputs and applying the differential result to inputs of top level, synchronization pattern, digital correlators; d. programming the top level digital correlators for an expected synchronization pattern and signature; e. calculating a dynamic threshold level using average received signal strength during a synchronization period and average correlator output during a specified period, as inputs for a table lookup of precalculated threshold values; f. detecting the arrival of the synchronization pattern when an output of the top level digital correlators exceeds the dynamic threshold level; g. processing outputs of the top level digital correlators to determine a precise synchronization arrival time; and h. comparing the output of the top level digital correlators to determine a received synchronization signature.
Claim 2
Independent Claim
177 words
A method for two level correlation and detection of a synchronization pattern comprising the steps of: a. correlating a down converted, received signal for coincidence with two expected unique symbol chip sequences, to generate two symbol correlator outputs; b. sampling and converting the two symbol correlator outputs into digital format; c. finding the binary difference of the two symbol correlator outputs and applying the differential result to inputs of top level, synchronization pattern, digital correlators; d. programming the top level digital correlators for an expected synchronization pattern and signature; e. calculating a dynamic threshold level using average received signal strength during a synchronization period and average correlator output during a specified period, as inputs for a table lookup of precalculated threshold values; f. detecting the arrival of the synchronization pattern when an output of the top level digital correlators exceeds the dynamic threshold level; g. processing outputs of the top level digital correlators to determine a precise synchronization arrival time; and h. comparing the output of the top level digital correlators to determine a received synchronization signature.
Claim 3
Dependent Claim
49 words
The method of claim 1, wherein the correlating step includes: a. finding the analog difference of the two symbol correlator outputs; b. sampling and converting the correlation differential outputs into digital format; and c. applying the sampled differential result to the inputs of top level, synchronization pattern, digital correlators.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-01-28 | 2000-07-29 | 2001-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-01-28 | 2004-07-29 | 2005-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-01-28 | 2008-07-29 | 2009-01-28 | $7700.00 | Window Closed / Lapsed |