Dual internal bus system architecture for hard disk drive

Claim 1

An electronic architecture for a hard disk drive that can be coupled to an external device, comprising: disk means for storing information; spin motor means for rotating said disk means; actuator arm assembly means for transferring information relative to said disk means, said actuator arm assembly means including a voice coil used to move a read/write head relative to said disk means; data manager means for transferring information with the external device; read/write means for transferring information between said read/write head and said data manager means; servo module means containing voice coil control circuit means for controlling said voice coil, spin motor control circuit means for controlling said spin motor means, said servo module means further having digital to analog converter means for converting digital command signals to analog input signals that are provided to said voice coil and said spin motor control circuit means; controller means for controlling said data manager means, said read/write means and said servo module means, said controller means providing digital command signals to said servo module means to control said spin motor means and said actuator arm assembly means, said controller means including a digital signal processor having separate internal first and second busses and a plurality of hardware elements communicating with said digital signal processor by means of a plurality of external conductors that are external to said digital signal processor and are different from said first and second internal busses, with said first internal bus for transferring instructions and said second internal bus for transferring data and in which said digital signal processor executes fetching, decoding, reading and execution routines in parallel including receiving data at the same time said digital signal processor is executing said instructions, said plurality of hardware elements and said digital signal processor being on the same structure, said plurality of hardware elements being all of said hardware elements on said same support structure that communicate with said digital signal processor, said plurality of external conductors constituting all of said conductors that communicate between said plurality of hardware elements and said digital signal processor, said digital signal processor operating with less instructions than instructions required when a conventional processor, different from said digital signal processor, is used as part of said controller means; wherein a memory internal to said digital signal processor is powered by a voltage less than a voltage required when conventional processor, different from said digital signal processor, is used.