Patent FR1397656A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5592002A Expired / Lapsed US ⏱️ 0.0 years remaining

Non-volatile semiconductor memory device having reduced current consumption

Assignee: Renesas Electronics Corp
•
Filing: 1995-09-27
•
Granted: 1997-01-07
•
Expires: 2015-09-27
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract In a non-volatile semiconductor memory device, an n-type impurity diffusion layer constituting source and drain regions is formed on the surface area of a p-type silicon substrate, and then a first oxide film is formed on the n-type impurity diffusion layer. A floating gate is formed on the silicon substrate so as to be partially overlapped with the drain region through a second oxide film, and a control gate is formed thereon through a third oxide film and an insulating film. The thickness of the third oxide film is set to a value larger than the total thickness of the second oxide film and the insulating film to prevent occurrence of F-N tunnel action in a split gate region.

Inventors

  • 👤 Kohji Kanamori

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 15:51
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/681; H10D30/683; H10D30/6891

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 210 words
A non-volatile semiconductor memory device comprising: a semiconductor substrate of a first conduction type; a source region and a drain region of a second conduction type formed in said semiconductor substrate and separated by first and second channel regions, said first channel being adjacent to said drain region and said second channel region being adjacent to said source region; a first insulating film formed over said first channel region; a floating gate formed over said first insulating film; a second insulating film formed over said floating gate; a control gate formed over said second insulating film; a third insulating film formed over said second channel region; a split gate, electrically connected to said control gate, formed over said third insulating film; wherein relative thickness of said insulating films is ordered so that the thickness of said first insulating film is the smallest, the thickness of said third insulating film is the largest, and the thickness of said second insulating film is greater than the thickness of said first insulating film and less than the thickness of said third insulating film; and wherein said non-volatile semiconductor memory performs a data writing operation such that electrons are drawn out from said floating gate to said drain region by a Fowler-Nordheim tunnelling action.
Claim 2
Dependent Claim 210 words
A non-volatile semiconductor memory device comprising: a semiconductor substrate of a first conduction type; a source region and a drain region of a second conduction type formed in said semiconductor substrate and separated by first and second channel regions, said first channel being adjacent to said drain region and said second channel region being adjacent to said source region; a first insulating film formed over said first channel region; a floating gate formed over said first insulating film; a second insulating film formed over said floating gate; a control gate formed over said second insulating film; a third insulating film formed over said second channel region; a split gate, electrically connected to said control gate, formed over said third insulating film; wherein relative thickness of said insulating films is ordered so that the thickness of said first insulating film is the smallest, the thickness of said third insulating film is the largest, and the thickness of said second insulating film is greater than the thickness of said first insulating film and less than the thickness of said third insulating film; and wherein said non-volatile semiconductor memory performs a data writing operation such that electrons are drawn out from said floating gate to said drain region by a Fowler-Nordheim tunnelling action.
Claim 3
Dependent Claim 34 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein the thickness of said third insulating film is set to be larger than the total thickness of said first and second insulating films.
Claim 4
Dependent Claim 57 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein said source and drain regions are buried under a relatively thick fourth insulating film, except for respective parts of said source and drain regions which are near to a channel region, and said floating gate is overlapped with said drain region through said fourth insulating film.
Claim 5
Dependent Claim 35 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein said second insulating film is designed in a laminate structure containing a silicon oxide film, a silicon nitride film and a silicon oxide film.
Claim 6
Dependent Claim 37 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein said control gate is formed integrally and continuously with said split gate so as to extend over said source and drain regions to the semiconductor substrate.
Claim 7
Dependent Claim 43 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein the minimum thickness of said first insulating film is set to such a value that Fowler-Nordheim tunnel current is permitted to flow and the maximum thickness thereof is set to 11 nm.
Claim 8
Dependent Claim 58 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein the thickness of said first insulating film is in the range of 8 nm and 11 nm, the thickness of said second insulting film is in the range of 11 nm and 19 nm, and the thickness of said third insulating film is greater than 19 nm.
Claim 9
Dependent Claim 59 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein said first, second, and third insulating films' thicknesses are of such values that Fowler-Nordheim tunnel current flows through said first insulating film but not through said second insulting film and said third insulating film during a data writing and a data erasing of said non-volatile semiconductor memory device.
Claim 10
Dependent Claim 43 words
The non-volatile semiconductor memory device as claimed in claim 1, whereby said first, second, and third insulating films' thicknesses are set to such values that Fowler-Nordheim tunnel current can be used for both data writing and data erasing, and current consumption is reduced.
Claim 11
Dependent Claim 38 words
The non-volatile semiconductor memory device as claimed in claim 1, further comprising a means for writing and erasing said non-volatile semiconductor memory device using Fowler-Nordheim tunnel current, thereby reducing the current consumption of said non-volatile semiconductor memory device.
Claim 12
Dependent Claim 38 words
The non-volatile semiconductor memory device as claimed in claim 1, wherein said non-volatile semiconductor memory performs a data erasing operation such that electrons are injected from said drain region into said floating gate by said Fowler-Nordheim tunneling action.
Claim 13
Dependent Claim 179 words
A non-volatile semiconductor memory device comprising: a semiconductor substrate of a first conduction type; a source region and a drain region of a second conduction type formed in said semiconductor substrate and separated by first and second channel regions, said first channel being adjacent to said drain region and said second channel region being adjacent to said source region; a first insulating film formed over said first channel region; a floating gate formed over said first insulating film; a second insulating film formed over said floating gate; a control gate formed over said second insulating film; a third insulating film formed over said second channel region; a split gate, electrically connected to said control gate, formed over said third insulating film; a means for reducing current consumption during data writing and data erasing, said writing and erasing using Fowler-Nordheim tunnel current which passes through only said first insulating film; and wherein said non-volatile semiconductor memory performs said data writing operation such that electrons are drawn out from said floating gate to said drain region by a Fowler-Nordheim tunnelling action.
Claim 14
Dependent Claim 179 words
A non-volatile semiconductor memory device comprising: a semiconductor substrate of a first conduction type; a source region and a drain region of a second conduction type formed in said semiconductor substrate and separated by first and second channel regions, said first channel being adjacent to said drain region and said second channel region being adjacent to said source region; a first insulating film formed over said first channel region; a floating gate formed over said first insulating film; a second insulating film formed over said floating gate; a control gate formed over said second insulating film; a third insulating film formed over said second channel region; a split gate, electrically connected to said control gate, formed over said third insulating film; a means for reducing current consumption during data writing and data erasing, said writing and erasing using Fowler-Nordheim tunnel current which passes through only said first insulating film; and wherein said non-volatile semiconductor memory performs said data writing operation such that electrons are drawn out from said floating gate to said drain region by a Fowler-Nordheim tunnelling action.
Claim 15
Dependent Claim 38 words
The non-volatile semiconductor memory device as claimed in claim 12, further comprising a means for writing and erasing said non-volatile semiconductor memory device using Fowler-Nordheim tunnel current, thereby reducing the current consumption of said non-volatile semiconductor memory device.

References Cited (Backward Citations)

JPS60161673A Cited
JPS62271474A Cited
US4750024A Cited
JPH02118997A Cited
US5095344A Cited
US5130769A Cited
US5274588A Cited
US5192872A Cited
US5317179A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-01-07 2000-07-08 2001-01-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-01-07 2004-07-08 2005-01-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-01-07 2008-07-08 2009-01-07 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag