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US5589796A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for increasing amplifier efficiency

Assignee: Google Technology Holdings LLC
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Filing: 1994-11-01
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Granted: 1996-12-31
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Expires: 2014-11-01
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Abstract

Abstract A transmitter (107) includes amplifying circuitry (203) and control circuitry (215, 217, 219) for biasing the amplifying circuitry (203) so that it operates closer to saturation with increased efficiency. The gate voltage signal (213), which provides a gate bias, is coupled to the amplifying circuitry (203) and is dynamically varied by the processor circuitry (219) in response to the value of the amplifier control voltage (211) coupled to the amplifying circuitry (203). The amplifier control voltage (211), which has a value for maintaining the output power of the amplifying circuitry (203) at a constant, is produced by the integrating circuitry (217) in response to a comparison of the detected power output signal (216) produced by the detecting circuitry (215) and the power output control signal (218) produced by the processor circuitry (219). Efficiency is realized by dynamically varying the gate voltage signal (213) to its largest magnitude so that the amplifying circuitry (203) may operate as close to saturation as possible while still maintaining a constant output power.

Inventors

  • 👤 William P. Alberth, Jr.
  • 👤 John J. Janssen
  • 👤 Armin Klomsdorf

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 00:11
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/007; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0216; H03F1/0233

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 254 words
Control circuitry for controlling amplifying circuitry, the amplifying circuitry for amplifying an input signal into an amplified output signal, the amplifying circuitry coupled to a power source and having a first, a second, and a third input, an output, a saturation point, an amplification magnitude responsive to an amplifier control signal, and a gate bias responsive to a gate voltage signal, the input signal coupled to a first input of the amplifying circuitry, the amplifier control signal coupled to a second input of the amplifying circuitry, the gate voltage signal coupled to a third input of the amplifying circuitry, the amplified output signal having an output power level and coupled to an output of the amplifying circuitry, the control circuitry comprising: detecting circuitry for detecting the output power level of the amplified output signal, said detecting circuitry coupled to the output of the amplifying circuitry; integrating circuitry, responsive to said detecting circuitry, for generating the amplifier control signal for setting the amplification magnitude of the amplifying circuitry so that the output power level of the amplified output signal remains at a constant level, said integrating circuitry coupled to an output of said detecting circuitry and coupled to the second input of the amplifying circuitry; and processor circuitry for dynamically varying the gate voltage signal to its largest operative magnitude causing the amplifying circuitry to function at or near the saturation point for increased efficiency, said processor circuitry coupled to said integrating circuitry, the third input of the amplifying circuitry, and to the power source.
Claim 2
Dependent Claim 254 words
Control circuitry for controlling amplifying circuitry, the amplifying circuitry for amplifying an input signal into an amplified output signal, the amplifying circuitry coupled to a power source and having a first, a second, and a third input, an output, a saturation point, an amplification magnitude responsive to an amplifier control signal, and a gate bias responsive to a gate voltage signal, the input signal coupled to a first input of the amplifying circuitry, the amplifier control signal coupled to a second input of the amplifying circuitry, the gate voltage signal coupled to a third input of the amplifying circuitry, the amplified output signal having an output power level and coupled to an output of the amplifying circuitry, the control circuitry comprising: detecting circuitry for detecting the output power level of the amplified output signal, said detecting circuitry coupled to the output of the amplifying circuitry; integrating circuitry, responsive to said detecting circuitry, for generating the amplifier control signal for setting the amplification magnitude of the amplifying circuitry so that the output power level of the amplified output signal remains at a constant level, said integrating circuitry coupled to an output of said detecting circuitry and coupled to the second input of the amplifying circuitry; and processor circuitry for dynamically varying the gate voltage signal to its largest operative magnitude causing the amplifying circuitry to function at or near the saturation point for increased efficiency, said processor circuitry coupled to said integrating circuitry, the third input of the amplifying circuitry, and to the power source.
Claim 3
Dependent Claim 54 words
Control circuitry in accordance with claim 1 wherein said integrating circuitry is further coupled to said processor circuitry such that the amplifier control signal generated by said integrating circuitry consists of an integration of the output power level of the amplified output signal and a power output control signal provided by said processor circuitry.
Claim 4
Dependent Claim 31 words
Control circuitry in accordance with claim 1 wherein the amplifier control signal is further coupled to said processor circuitry for determining whether the amplifying circuitry is operating near the saturation point.
Claim 5
Dependent Claim 37 words
Control circuitry in accordance with claim 3 wherein determining whether the amplifying circuitry is operating near the saturation point further comprises comparing the difference between the power source and the amplifier control signal to a predetermined value.
Claim 6
Dependent Claim 30 words
Control circuitry in accordance with claim 3 wherein said processor circuitry increases or decreases the gate voltage signal responsive to whether the amplifying circuitry is operating near the saturation point.
Claim 7
Dependent Claim 23 words
Control circuitry in accordance with claim 1 wherein said processor circuitry further includes an operational amplifier configuration for inverting the gate voltage signal.
Claim 8
Dependent Claim 35 words
Control circuitry in accordance with claim 6 wherein said operational amplifier configuration further includes a resistor divider for coupling the amplifier control signal to an input of said operational amplifier configuration as a reference voltage.
Claim 9
Dependent Claim 359 words
Control circuitry for controlling a multi-stage amplifier, the multi-stage amplifier comprised of a power amplifier driver and a power amplifier for amplifying an input signal into an amplified output signal, the power amplifier driver having a first and a second input, an output, and an amplification magnitude responsive to an amplifier control signal, the power amplifier coupled to a power source and having a first input coupled to the output of the power amplifier driver, a second input, an output, a saturation point, and a gate bias responsive to a gate voltage signal, the input signal coupled to the first input of the power amplifier driver, the amplifier control signal coupled to the second input of the power amplifier driver, the gate voltage signal coupled to the second input of the power amplifier, the amplified output signal having an output power level and coupled to the output of the power amplifier, the control circuitry comprising: a directional coupler for electromagnetically coupling the amplified output signal from the output of the power amplifier without excessive loss; a detector, responsive to the directional coupler, for generating a detected power output signal indicative of the output power level of the amplified output signal; a microprocessor for generating a power output control signal comprised of a predetermined value dictating the output power level of the amplified output signal; an integrator, coupled between the detector and an output of the microprocessor, for comparing the detected power output signal to the power output control signal; a buffer, responsive to the integrator, for increasing or decreasing a magnitude of the amplifier control signal for setting the amplification magnitude of the power amplifier driver so that the output power level of the amplified output signal remains at a constant level; and an operational amplifier configuration, responsive to a voltage generated for dictating an increase or a decrease in the gate voltage signal via a comparison of the amplifier control signal and the power source to determine if the multi-stage amplifier is in saturation, for generating a negative magnitude of the gate voltage signal to operate the power amplifier at or near the saturation point for increased efficiency.
Claim 10
Dependent Claim 359 words
Control circuitry for controlling a multi-stage amplifier, the multi-stage amplifier comprised of a power amplifier driver and a power amplifier for amplifying an input signal into an amplified output signal, the power amplifier driver having a first and a second input, an output, and an amplification magnitude responsive to an amplifier control signal, the power amplifier coupled to a power source and having a first input coupled to the output of the power amplifier driver, a second input, an output, a saturation point, and a gate bias responsive to a gate voltage signal, the input signal coupled to the first input of the power amplifier driver, the amplifier control signal coupled to the second input of the power amplifier driver, the gate voltage signal coupled to the second input of the power amplifier, the amplified output signal having an output power level and coupled to the output of the power amplifier, the control circuitry comprising: a directional coupler for electromagnetically coupling the amplified output signal from the output of the power amplifier without excessive loss; a detector, responsive to the directional coupler, for generating a detected power output signal indicative of the output power level of the amplified output signal; a microprocessor for generating a power output control signal comprised of a predetermined value dictating the output power level of the amplified output signal; an integrator, coupled between the detector and an output of the microprocessor, for comparing the detected power output signal to the power output control signal; a buffer, responsive to the integrator, for increasing or decreasing a magnitude of the amplifier control signal for setting the amplification magnitude of the power amplifier driver so that the output power level of the amplified output signal remains at a constant level; and an operational amplifier configuration, responsive to a voltage generated for dictating an increase or a decrease in the gate voltage signal via a comparison of the amplifier control signal and the power source to determine if the multi-stage amplifier is in saturation, for generating a negative magnitude of the gate voltage signal to operate the power amplifier at or near the saturation point for increased efficiency.
Claim 11
Independent Claim 195 words
A method of controlling amplifying circuitry, the amplifying circuitry coupled to a power source and having a first, a second, and a third input, an output, a saturation point, a gate bias responsive to a gate voltage signal, and amplifying an input signal responsive to an amplifier control signal into an amplified output signal, the input signal coupled to the first input of the amplifying circuitry, the amplifier control signal coupled to the second input of the amplifying circuitry, the gate voltage signal coupled to the third input of the amplifying circuitry, the amplified output signal coupled to the output of the amplifying circuitry, the method of controlling the amplifying circuitry comprising the steps of: (a) detecting a power level of the amplified output signal and generating a detected output power level signal; (b) integrating the detected output power level signal and a power level control signal into the amplifier control signal; (c) generating the amplifier control signal so that the amplified output signal remains constant; and (d) dynamically varying the gate voltage signal to a most negative operative magnitude such that the amplifying circuitry functions at or near the saturation point for increased efficiency.
Claim 12
Independent Claim 195 words
A method of controlling amplifying circuitry, the amplifying circuitry coupled to a power source and having a first, a second, and a third input, an output, a saturation point, a gate bias responsive to a gate voltage signal, and amplifying an input signal responsive to an amplifier control signal into an amplified output signal, the input signal coupled to the first input of the amplifying circuitry, the amplifier control signal coupled to the second input of the amplifying circuitry, the gate voltage signal coupled to the third input of the amplifying circuitry, the amplified output signal coupled to the output of the amplifying circuitry, the method of controlling the amplifying circuitry comprising the steps of: (a) detecting a power level of the amplified output signal and generating a detected output power level signal; (b) integrating the detected output power level signal and a power level control signal into the amplifier control signal; (c) generating the amplifier control signal so that the amplified output signal remains constant; and (d) dynamically varying the gate voltage signal to a most negative operative magnitude such that the amplifying circuitry functions at or near the saturation point for increased efficiency.
Claim 13
Dependent Claim 88 words
A method of controlling amplifying circuitry in accordance with claim 9 wherein said step (d) of dynamically varying is preceded by the steps of: determining if the saturation point of the amplifying circuitry has been reached by comparing the amplifier control signal to the power source; increasing, responsive to determining that the saturation point has been reached, the gate voltage signal by a first predetermined increment; and decreasing, responsive to determining that the saturation point has not been reached, the gate voltage signal by a second predetermined increment.
Claim 14
Dependent Claim 34 words
A method of controlling amplifying circuitry in accordance with claim 10 wherein said step of decreasing is preceded by the step of: determining if the gate voltage signal is less than a predetermined value.
Claim 15
Dependent Claim 27 words
A method of controlling amplifying circuitry in accordance with claim 9 further comprising the step of: causing the amplifying circuitry to attenuate in a forward isolation mode.
Claim 16
Independent Claim 212 words
A method of controlling amplifying circuitry of an RF communication device, the amplifying circuitry coupled to a power source and having a first and a second input, an output, a saturation point, a gate bias responsive to a gate voltage signal, and amplifying an input signal into an amplified output signal having one of a plurality of power levels, the input signal coupled to the first input of the amplifying circuitry, the gate voltage signal coupled to the second input of the amplifying circuitry, the amplified output signal coupled to the output of the amplifying circuitry, the method of controlling the amplifying circuitry comprising the steps of: (a) causing the amplifying circuitry to attenuate in a forward isolation mode; (b) boosting the amplifying circuitry, when the RF communication device is outside of a range of normal communications, such that the amplified output signal has a power level greater than the plurality of power levels to maintain communication; and (c) dynamically varying the gate voltage signal, when the RF communication device is functioning within the range of normal communications, for operating the amplifying circuitry as close to the saturation point as possible without preventing the amplifying circuitry from maintaining the amplified output signal at a preferred one of the plurality of power levels.
Claim 17
Independent Claim 212 words
A method of controlling amplifying circuitry of an RF communication device, the amplifying circuitry coupled to a power source and having a first and a second input, an output, a saturation point, a gate bias responsive to a gate voltage signal, and amplifying an input signal into an amplified output signal having one of a plurality of power levels, the input signal coupled to the first input of the amplifying circuitry, the gate voltage signal coupled to the second input of the amplifying circuitry, the amplified output signal coupled to the output of the amplifying circuitry, the method of controlling the amplifying circuitry comprising the steps of: (a) causing the amplifying circuitry to attenuate in a forward isolation mode; (b) boosting the amplifying circuitry, when the RF communication device is outside of a range of normal communications, such that the amplified output signal has a power level greater than the plurality of power levels to maintain communication; and (c) dynamically varying the gate voltage signal, when the RF communication device is functioning within the range of normal communications, for operating the amplifying circuitry as close to the saturation point as possible without preventing the amplifying circuitry from maintaining the amplified output signal at a preferred one of the plurality of power levels.

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Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-31 2000-07-01 2000-12-31 $2000.00 Window Closed / Lapsed
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