← Back to Patent Explorer
US5589751A Expired / Lapsed US ⏱️ 0.0 years remaining

Sensorless switched reluctance motor

Assignee: LG Electronics Inc
•
Filing: 1993-12-16
•
Granted: 1996-12-31
•
Expires: 2013-12-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A sensorless SRM suitable to drive the SRM based on the position of a rotor detected through the detection of the variation of the current of each phase without providing separate sensors for identifying the position of the rotor includes a motor driving part for driving the motor by exciting phases of the motor in a predetermined sequence, a differentiating part for differentiating the currents exciting the phases of the motor respectively, an amplifying part for amplifying output voltages from the differentiating part to proper levels, and a comparing part for comparing output voltages of the amplifying part with reference voltages respectively to generate a high level signal when the output voltage of the amplifying part is higher than the reference voltage and a low level signal when the output voltage of the amplifying part is lower than the reference voltage.

Inventors

  • 👤 Jun Y. Lim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 19:01
CPC Classifications
H; H02; H02P; H02P6/00; H02P6/14; H02P6/16; H02P6/18; H02P25/00; H02P25/02; H02P25/08; H02P25/086; H02P25/089

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 234 words
A switch for a sensorless switched reluctance motor comprising: motor driving means for driving the motor by exciting phases of the motor with current in a predetermined sequence; filtering means for filtering the current exciting the phases of the motor; first amplifying means for amplifying output voltages from said filtering means to respective first proper levels; first comparing means for comparing output voltages of said first amplifying means with first references voltages respectively, to generate a high level signal when the output voltage of said first amplifying means is higher than the respective first reference voltage and a low level signal when the output voltage of said first amplifying means is lower than the respective first reference voltage; delaying means for delaying the output voltages from said filtering means for predetermined times; second amplifying means for amplifying the output voltages from said delaying means to respective second proper levels; second comparing means for comparing output voltages from said second amplifying means with second reference voltages respectively, to generate a high level signal when the output voltage of said second amplifying means is higher than the respective second reference voltage and a low level signal when the output voltage of said second amplifying means is lower than the respective second reference voltage; and OR gating means for ORing the output signals from said first comparing means and the output signals from said second comparing means.
Claim 2
Dependent Claim 234 words
A switch for a sensorless switched reluctance motor comprising: motor driving means for driving the motor by exciting phases of the motor with current in a predetermined sequence; filtering means for filtering the current exciting the phases of the motor; first amplifying means for amplifying output voltages from said filtering means to respective first proper levels; first comparing means for comparing output voltages of said first amplifying means with first references voltages respectively, to generate a high level signal when the output voltage of said first amplifying means is higher than the respective first reference voltage and a low level signal when the output voltage of said first amplifying means is lower than the respective first reference voltage; delaying means for delaying the output voltages from said filtering means for predetermined times; second amplifying means for amplifying the output voltages from said delaying means to respective second proper levels; second comparing means for comparing output voltages from said second amplifying means with second reference voltages respectively, to generate a high level signal when the output voltage of said second amplifying means is higher than the respective second reference voltage and a low level signal when the output voltage of said second amplifying means is lower than the respective second reference voltage; and OR gating means for ORing the output signals from said first comparing means and the output signals from said second comparing means.
Claim 3
Dependent Claim 24 words
A switch for a sensorless switched reluctance motor as claimed in claim 1, wherein said OR gating means includes a plurality of OR gates.
Claim 4
Dependent Claim 244 words
A switch for a sensorless switched reluctance motor comprising: motor driving means for driving the motor by exciting phases of the motor in a predetermined sequence; adding means for adding the current of each phase; low pass filtering means for filtering the output signals from said adding means; first amplifying means for amplifying output voltages from said low pass filtering means to respective first proper levels; first comparing means for comparing output voltages of said first amplifying means with first reference voltages respectively, to generate a high level signal when the output voltage of said first amplifying means is higher than the respective first reference voltage and a low level signal when the output voltage of said first amplifying means is lower than the respective first reference voltage; delaying means for delaying the output voltages from said filtering means for predetermined times; second amplifying means for amplifying the output voltages from said delaying means to respective second proper levels; second comparing means for comparing output voltages from said second amplifying means with second reference voltages respectively, to generate a high level signal when the output voltage of said second amplifying means is higher than the respective second reference voltage and a low level signal when the output voltage of said second amplifying means is lower than the respective second reference voltage; and OR gating means for ORing the output signals from said first comparing means and the output signals from said second comparing means.
Claim 5
Dependent Claim 244 words
A switch for a sensorless switched reluctance motor comprising: motor driving means for driving the motor by exciting phases of the motor in a predetermined sequence; adding means for adding the current of each phase; low pass filtering means for filtering the output signals from said adding means; first amplifying means for amplifying output voltages from said low pass filtering means to respective first proper levels; first comparing means for comparing output voltages of said first amplifying means with first reference voltages respectively, to generate a high level signal when the output voltage of said first amplifying means is higher than the respective first reference voltage and a low level signal when the output voltage of said first amplifying means is lower than the respective first reference voltage; delaying means for delaying the output voltages from said filtering means for predetermined times; second amplifying means for amplifying the output voltages from said delaying means to respective second proper levels; second comparing means for comparing output voltages from said second amplifying means with second reference voltages respectively, to generate a high level signal when the output voltage of said second amplifying means is higher than the respective second reference voltage and a low level signal when the output voltage of said second amplifying means is lower than the respective second reference voltage; and OR gating means for ORing the output signals from said first comparing means and the output signals from said second comparing means.

References Cited (Backward Citations)

US4186435A Cited
US4506765A Cited
US4353016A Cited
US4401934A Cited
US4641066A Cited
US5144231A Cited
US5160873A Cited
US5182500A Cited
US5291115A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-31 2000-07-01 2000-12-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-12-31 2004-07-01 2004-12-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-12-31 2008-07-01 2008-12-31 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag