Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
267 words
A process for fabricating a high-voltage MOSFET device on a semiconductor substrate doped with impurities of a first conductivity type as the drain region for said MOSFET device, said process comprising: subsequently forming a first doped layer of the first conductivity type on said substrate, a second doped layer of the first conductivity type on said first doped layer, a third doped layer of the first conductivity type on said second doped layer and a shielding layer on said third doped layer, wherein said second doped layer has an impurity concentration smaller than the impurity concentration of said first doped layer and a thickness larger than the thickness of said first doped layer, and larger impurity concentration than the third doped layer and a smaller thickness than said third doped layer, and wherein said impurity concentration of said first doped layer is smaller than the impurity concentration of said substrate; forming an opening in said shielding layer; forming the source region of said MOSFET device in said third doped layer in the area exposed by said opening; performing a thermal oxidation process for forming a field oxide layer over said source region; etching said third doped layer by using said field oxide layer as a first mask thereby exposing said second doped layer to form a source protruding body; forming an insulating layer around the sidewalls of said source protruding body; and utilizing said field oxide layer and said insulating layer as a second mask for implanting impurities of a second conductivity type into said second doped layer, thereby forming the gate region for said MOSFET device.
Claim 2
Dependent Claim
267 words
A process for fabricating a high-voltage MOSFET device on a semiconductor substrate doped with impurities of a first conductivity type as the drain region for said MOSFET device, said process comprising: subsequently forming a first doped layer of the first conductivity type on said substrate, a second doped layer of the first conductivity type on said first doped layer, a third doped layer of the first conductivity type on said second doped layer and a shielding layer on said third doped layer, wherein said second doped layer has an impurity concentration smaller than the impurity concentration of said first doped layer and a thickness larger than the thickness of said first doped layer, and larger impurity concentration than the third doped layer and a smaller thickness than said third doped layer, and wherein said impurity concentration of said first doped layer is smaller than the impurity concentration of said substrate; forming an opening in said shielding layer; forming the source region of said MOSFET device in said third doped layer in the area exposed by said opening; performing a thermal oxidation process for forming a field oxide layer over said source region; etching said third doped layer by using said field oxide layer as a first mask thereby exposing said second doped layer to form a source protruding body; forming an insulating layer around the sidewalls of said source protruding body; and utilizing said field oxide layer and said insulating layer as a second mask for implanting impurities of a second conductivity type into said second doped layer, thereby forming the gate region for said MOSFET device.
Claim 3
Dependent Claim
45 words
The process as in claim 1, wherein said first doped layer of said first conductivity type further comprises an upper layer and a lower layer, said upper layer having an impurity concentration smaller than said lower layer and a thickness larger than said lower layer.
Claim 4
Dependent Claim
23 words
The process as in claim 1, further comprising the steps of forming the electrodes for said drain region, gate region and source region.
Claim 5
Dependent Claim
18 words
The process as in claim 1, wherein said first, second and third doped layers are epitaxially grown layers.
Claim 6
Dependent Claim
18 words
The process as in claim 1, wherein said insulating layer comprises an oxide layer and a nitride layer.
Claim 7
Dependent Claim
20 words
The process as in claim 1, wherein said first conductivity type is N-type and said second conductivity type is P-type.
Claim 8
Dependent Claim
20 words
The process as in claim 1, wherein said first conductivity type is P-type and said second conductivity type is N-type.