US5581102A
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Transistor and method for manufacturing the same
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1996-02-26
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Granted: 1996-12-03
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Expires: 2016-02-26
Abstract
Abstract In a process for manufacturing a thin film transistor having a semiconductor layer constituting source and drain regions and a channel forming region, by the semiconductor layer being made thinner in the source and drain regions than in the channel forming region a structure is realized wherein, at the boundary between the source region and the channel forming region and the boundary between the drain region and the channel forming region, portions where electric field concentrations occur are displaced from the portion where a channel is formed. By reducing the OFF current (the leak current) without also reducing the ON current, a high mutual conductance is realized.
Inventors
- 👤 Naoto Kusumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:06
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
143 words
A transistor comprising: a semiconductor layer provided on a flat insulating surface and having a protrusion, the semiconductor layer comprising a source region, a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulating layer therebetween; and at least one electrode connected to at least one of said source region and said drain region; wherein at least one junction interface between said channel and said at least one of said source region and said drain region is aligned with a side of said gate electrode, and said at least one of said source region and said drain region has a substantially constant impurity concentration distribution in a direction parallel to said flat surface, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 2
Dependent Claim
143 words
A transistor comprising: a semiconductor layer provided on a flat insulating surface and having a protrusion, the semiconductor layer comprising a source region, a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulating layer therebetween; and at least one electrode connected to at least one of said source region and said drain region; wherein at least one junction interface between said channel and said at least one of said source region and said drain region is aligned with a side of said gate electrode, and said at least one of said source region and said drain region has a substantially constant impurity concentration distribution in a direction parallel to said flat surface, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 3
Dependent Claim
29 words
The transistor of claim 1 wherein a channel is located in said channel forming region and apart from at least one of said source region and said drain region.
Claim 4
Dependent Claim
30 words
The transistor of claim 2 wherein said channel is located at a level different from that of location of at least one of said source region and said drain region.
Claim 5
Dependent Claim
11 words
The transistor of claim 1 wherein said insulating substrate is transparent.
Claim 6
Dependent Claim
24 words
The transistor of claim 1 wherein said gate electrode comprises a material selected from the group consisting of polysilicon, aluminum, chromium, molybdenum and tantalum.
Claim 7
Dependent Claim
23 words
The transistor of claim 1 wherein said gate electrode is self-aligned with at least one of said source region and said drain region.
Claim 8
Dependent Claim
74 words
A transistor comprising: a source and drain provided in a semiconductor layer between said source and said drain, said semiconductor layer having a protrusion in said channel forming region; and wherein said protrusion has a height of 200 to 2000 angstroms, and at least one of junction interfaces between said source and said channel forming region and between said drain and said channel forming region is apart from a side of said gate electrode.
Claim 9
Dependent Claim
74 words
A transistor comprising: a source and drain provided in a semiconductor layer between said source and said drain, said semiconductor layer having a protrusion in said channel forming region; and wherein said protrusion has a height of 200 to 2000 angstroms, and at least one of junction interfaces between said source and said channel forming region and between said drain and said channel forming region is apart from a side of said gate electrode.
Claim 10
Dependent Claim
21 words
The transistor of claim 7 wherein said gate electrode is self-aligned with at least one of said source and said drain.
Claim 11
Dependent Claim
11 words
The transistor of claim 7 wherein said insulating surface is transparent.
Claim 12
Dependent Claim
156 words
A transistor comprising: a semiconductor layer provided on a flat insulting surface and having a protrusion, the semiconductor layer comprising a source region, a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulting layer therebetween; an anodic oxide provided at least on a side of said gate electrode; and at least one electrode connected to at least one of said source region and side drain region. wherein at least one junction interface between said channel and said at least one of said source region and said drain region is aligned with a side of said gate electrode, and said at least one of said source region and said drain region has a substantially constant impurity concentration distribution in a direction parallel to said flat surface, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 13
Dependent Claim
156 words
A transistor comprising: a semiconductor layer provided on a flat insulting surface and having a protrusion, the semiconductor layer comprising a source region, a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulting layer therebetween; an anodic oxide provided at least on a side of said gate electrode; and at least one electrode connected to at least one of said source region and side drain region. wherein at least one junction interface between said channel and said at least one of said source region and said drain region is aligned with a side of said gate electrode, and said at least one of said source region and said drain region has a substantially constant impurity concentration distribution in a direction parallel to said flat surface, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 14
Dependent Claim
163 words
A transistor comprising: A semiconductor layer provided on a flat insulating surface and having a protrusion, the semiconductor layer comprising a source region, a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulating layer therebetween, said gate electrode comprising a material selected from the group consisting of a doped polycrystalline silicon, aluminum, chromium and molybdenum; and at least one electrode connected to at least one of said source region and said drain region, wherein at least one junction interface between said channel and said at least one of said source region and said drain region is aligned with a side of said gate electrode, and said at least one of said source region and said drain region has a substantially constant impurity concentration distribution in a direction parallel to said flat surface, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 15
Dependent Claim
163 words
A transistor comprising: A semiconductor layer provided on a flat insulating surface and having a protrusion, the semiconductor layer comprising a source region, a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulating layer therebetween, said gate electrode comprising a material selected from the group consisting of a doped polycrystalline silicon, aluminum, chromium and molybdenum; and at least one electrode connected to at least one of said source region and said drain region, wherein at least one junction interface between said channel and said at least one of said source region and said drain region is aligned with a side of said gate electrode, and said at least one of said source region and said drain region has a substantially constant impurity concentration distribution in a direction parallel to said flat surface, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 16
Independent Claim
166 words
A method for manufacturing a transistor comprising the steps of: forming a semiconductor layer on an insulator substrate; forming a gate insulating layer on said semiconductor layer; forming a layer to serve as a gate electrode on said gate insulating layer: forming a mask on said layer to serve as a gate electrode, etching said layer to serve as a gate electrode, said gate insulating layer, and a predetermined depth of a surface portion of said semiconductor layer using said mask by anisotropic etching in the vertical direction with respect to the substrate, said layer to serve as a gate electrode being patterned into said gate electrode; and introducing an impurity into said semiconductor layer in alignment with said gate electrode to form a source region and a drain region in said semiconductor layer, wherein thickness of said semiconductor layer in said source region and said drain region is made less than thickness of said semiconductor layer in said channel forming region by said etching step.
Claim 17
Independent Claim
166 words
A method for manufacturing a transistor comprising the steps of: forming a semiconductor layer on an insulator substrate; forming a gate insulating layer on said semiconductor layer; forming a layer to serve as a gate electrode on said gate insulating layer: forming a mask on said layer to serve as a gate electrode, etching said layer to serve as a gate electrode, said gate insulating layer, and a predetermined depth of a surface portion of said semiconductor layer using said mask by anisotropic etching in the vertical direction with respect to the substrate, said layer to serve as a gate electrode being patterned into said gate electrode; and introducing an impurity into said semiconductor layer in alignment with said gate electrode to form a source region and a drain region in said semiconductor layer, wherein thickness of said semiconductor layer in said source region and said drain region is made less than thickness of said semiconductor layer in said channel forming region by said etching step.
Claim 18
Dependent Claim
16 words
The method of claim 12 wherein a reactive ion etching is used as said anisotropic etching.
Claim 19
Dependent Claim
31 words
The method of claim 12 wherein said introducing step is carried out by irradiating said source region and said drain region with a laser light through an atmosphere comprising said impurity.
Claim 20
Dependent Claim
34 words
The method of claim 14 wherein said introducing step is carried out by doping with a surface of at least one of said source region and said drain region being exposed to said atmosphere.
Claim 21
Dependent Claim
22 words
The method of claim 14 wherein the irradiation of said laser light is carried out with said gate electrode as a mask.
Claim 22
Dependent Claim
23 words
The method of claim 14 wherein the irradiation of said laser light is carried out in a direction perpendicular to said insulator substrate.
Claim 23
Dependent Claim
14 words
The method of claim 14 wherein said laser light comprises an excimer laser light.
Claim 24
Dependent Claim
18 words
The method of claim 12 wherein said impurity is doped into said gate electrode by said introducing step.
Claim 25
Dependent Claim
14 words
The method of claim 12 wherein said predetermined depth is 200 to 2000 angstroms.
Claim 26
Dependent Claim
139 words
A transistor comprising: a semiconductor layer provided on a flat insulating surface and having a protrusion, the semiconductor layer comprising a source region and a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulating layer therebetween; and an anodic oxide provided at least on a side of said gate electrode, wherein at least one of junction interfaces between said source region and said channel and between said drain region and said channel is aligned with an outer said drain region and said channel is aligned with an outer side of said anodic oxide, and said semiconductor layer is thinner outside said outer side than inside said outer side, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 27
Dependent Claim
139 words
A transistor comprising: a semiconductor layer provided on a flat insulating surface and having a protrusion, the semiconductor layer comprising a source region and a drain region and a channel located in said protrusion between said source region and said drain region; a gate electrode provided adjacent to said channel with a gate insulating layer therebetween; and an anodic oxide provided at least on a side of said gate electrode, wherein at least one of junction interfaces between said source region and said channel and between said drain region and said channel is aligned with an outer said drain region and said channel is aligned with an outer side of said anodic oxide, and said semiconductor layer is thinner outside said outer side than inside said outer side, and wherein said protrusion is provided adjacent to said gate electrode.
Claim 28
Dependent Claim
15 words
The transistor of claim 21 wherein said gate electrode comprises a metal different from silicon.
Claim 29
Dependent Claim
99 words
A transistor comprising: a semiconductor layer provided on a flat insulating surface, the semiconductor layer comprising a source region, a drain region and a channel forming region located between said source region and said drain region; a gate electrode provided adjacent to said channel forming region with a gate insulating layer therebetween; and an anodic oxide provided at least a side of said gate electrode, wherein thickness t a of said semiconductor layer inside an outer side of said anodic oxide and thickness t b of said semiconductor layer outside said t b satisfy 0.3<t b /t a <0.9.
Claim 30
Dependent Claim
99 words
A transistor comprising: a semiconductor layer provided on a flat insulating surface, the semiconductor layer comprising a source region, a drain region and a channel forming region located between said source region and said drain region; a gate electrode provided adjacent to said channel forming region with a gate insulating layer therebetween; and an anodic oxide provided at least a side of said gate electrode, wherein thickness t a of said semiconductor layer inside an outer side of said anodic oxide and thickness t b of said semiconductor layer outside said t b satisfy 0.3<t b /t a <0.9.
Claim 31
Dependent Claim
20 words
The transistor of claim 7 wherein said semiconductor layer comprises a silicon having a thickness of 100 to 2000 Å.
References Cited (Backward Citations)
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