Code-division multiple-access receiver with sequential interference-canceling architecture

Claim 3

The method of claim 1, wherein said steps (c) through (f) are repeated in consecutive stages, including at least a first stage and a last stage, with at least one repetition of said steps (c) through (f) per symbol in each stage.

Claim 4

The method of claim 2 wherein, in said first stage, the symbol value input generated in said step (d) is an estimated symbol value of said symbol and said step (d) comprises correlating said despreading code with said baseband signal to generate the estimated symbol value.

Claim 5

The method of claim 3 wherein, in said first stage, said step (d) comprises limiting said estimated symbol value to no more than a certain maximum absolute value.

Claim 6

The method of claim 4 wherein, in said first stage, said step (d) comprises multiplying said estimated symbol value by a constant in addition to limiting said estimated symbol value to no more than a certain maximum absolute value.

Claim 7

The method of claim 3 wherein, in said first stage, said step (d) comprises dividing said estimated symbol value by an average absolute value of a certain number of estimated symbol values, to maintain a substantially constant average absolute value over said number of estimated symbol values.

Claim 8

The method of claim 3 wherein, in said stages other than said first stage, said step (d) comprises: correlating said despreading code with said baseband signal to produce a residual symbol value; and adding said residual symbol value to an estimated symbol value produced in a preceding stage.

Claim 9

The method of claim 7 wherein, in stages other than said first stage, said symbol value input is said residual symbol value and said step (e) comprises spreading said residual symbol value by said spreading code.

Claim 10

The method of claim 3 wherein, in said stages other than said first stage, said step (d) comprises: correlating said despreading code with said baseband signal to produce a first residual symbol value; adding said first residual symbol value to an estimated symbol value produced in a preceding stage, thereby producing a preliminary symbol value; and limiting said preliminary symbol value to no more than a certain maximum absolute value, thereby producing said estimated symbol value.

Claim 11

The method of claim 9 wherein, in said first stage, said step (d) also comprises multiplying said preliminary symbol value by a constant.

Claim 12

The method of claim 9 wherein, in said first stage, said step (d) also comprises dividing said preliminary symbol value by an average absolute value of a certain number of preliminary symbol values, to maintain a constant average absolute value over said number of preliminary symbol values.

Claim 13

The method of claim 9 wherein, in said stages other than said first stage, said step (e) comprises subtracting, from said estimated symbol value, said estimated symbol value produced in a preceding stage, thereby producing a second residual symbol value; and spreading said second residual symbol value by said spreading code.

Claim 14

The method of claim 2 wherein, in said first stage, said symbol value input is an estimated symbol value of said symbol and said step (e) comprises spreading said estimated symbol value by said spreading code.

Claim 15

The method of claim 2, wherein the symbol value input generated in said step (d) is an estimated symbol value of said symbol, the method comprising the further steps of: (h) respreading, in said last stage, the estimated symbol value, thereby producing a respread signal; (i) adding said baseband signal to said respread signal, thereby producing a sum signal; and (j) correlating said sum signal with a despreading code.

Claim 16

The method of claim 14, wherein, in said last stage, said steps (h), (i), and (j) are carried out for all estimated symbol values generated in said step (d) in all previous stages.

Claim 17

The method of claim 2, wherein the symbol value input generated in said step (d) is an estimated symbol value of said symbol, and wherein said steps (b) through (f) are carried out multiple times for a single symbol in each of said stages from said first stage to said last stage, to provide path diversity, and estimated symbol values generated in said last stage for said symbol are combined.

Claim 18

The method of claim 1, wherein the symbol value input generated in said step (d) is an estimated symbol value of said symbol, and wherein said step (a) produces two baseband signals, and said steps (b) through (g) are carried out separately for both of said baseband signals, with pairs of resulting estimated symbol values being combined after all repetitions of said steps (c) through (f).

Claim 19

The method of claim 1, wherein the symbol value input is an estimated symbol value of the symbol.

Claim 20

A code-division multiple-access receiver for receiving a code-division multiple-access signal combining signals of a plurality of stations, each station having a different spreading code and a corresponding despreading code, comprising: a front-end circuit for converting said code-division multiple-access signal to a baseband signal; a controller coupled to said front-end circuit, for recognizing symbol boundaries in said baseband signal; and a baseband processor coupled to said front-end circuit, for receiving said baseband signal, storing successive one-symbol portions of said baseband signal, despreading said one-symbol portions of said baseband signal to generate estimated symbol values, respreading said estimated symbol values to generate estimated interference signals, and modifying said baseband signal by subtracting said estimated interference signals, these processes of despreading, respreading, and modifying being carried out in a cyclic order responsive to symbol boundaries recognized by said controller.

Claim 21

A code-division multiple-access receiver for receiving a code-division multiple-access signal combining signals of a plurality of stations, each station having a different spreading code and a corresponding despreading code, comprising: a front-end circuit for converting said code-division multiple-access signal to a baseband signal; a controller coupled to said front-end circuit, for recognizing symbol boundaries in said baseband signal; and a baseband processor coupled to said front-end circuit, for receiving said baseband signal, storing successive one-symbol portions of said baseband signal, despreading said one-symbol portions of said baseband signal to generate estimated symbol values, respreading said estimated symbol values to generate estimated interference signals, and modifying said baseband signal by subtracting said estimated interference signals, these processes of despreading, respreading, and modifying being carried out in a cyclic order responsive to symbol boundaries recognized by said controller.

Claim 22

The receiver of claim 19, wherein said baseband processor comprises a first interference-canceling stage having a plurality of interference cancelers for generating estimated symbol values of respective stations, including at least one interference canceler for each of said stations.

Claim 23

The receiver of claim 20, wherein said first interference-canceling stage comprises more than one interference canceler per station, thereby providing path diversity by estimating separate values for a symbol that arrives via different paths with different delays.

Claim 24

The receiver of claim 20, wherein each interference canceler in said first interference-canceling stage separately comprises: a code generator for generating a spreading code and a despreading code of one of said stations; a correlator for correlating said despreading code with a one-symbol portion of said baseband signal, thereby generating an estimated symbol value; a multiplier for respreading said estimated symbol value, using said spreading code, thereby generating an estimated interference signal; and a subtractor for subtracting said estimated interference signal from said one-symbol portion of said baseband signal.

Claim 25

The receiver of claim 22, wherein each interference canceler in said first interference-canceling stage also comprises an adjustment processor for adjusting said estimated symbol value.

Claim 26

The receiver of claim 23, wherein said adjustment processor comprises a gain adjustment processor for dividing said estimated symbol value by an average absolute value of a certain number of estimated symbol values generated by said correlator.

Claim 27

The receiver of claim 23, wherein said data adjustment processor comprises a symbol adjustment processor for multiplying said estimated symbol value by a constant value.

Claim 28

The receiver of claim 23, wherein said data adjustment processor comprises a limiter for limiting said estimated symbol value to a certain maximum absolute value.

Claim 29

The receiver of claim 20, wherein: said baseband processor comprises a plurality of interference-canceling stages, including at least said first interference-canceling stage and a last interference-canceling stage, coupled in series; said baseband signal is passed through said series from said first interference-canceling stage toward said last interference-canceling stage; each interference-canceling stage other than said first interference-canceling stage comprises a plurality of interference cancelers for generating estimated symbol values of respective stations, including at least one interference canceler for each of said stations; and each interference-canceling stage other than said first interference-canceling stage receives, as old estimated symbol values, the estimated symbol values generated in a preceding interference-canceling stage in said series.

Claim 30

The receiver of claim 27, wherein each interference-canceling stage other than said first interference-canceling stage comprises more than one interference canceler per station, thereby providing path diversity by estimating separate values for a symbol that arrives via different paths with different delays.

Claim 31

The receiver of claim 27, wherein each interference canceler in interference-canceling stages other than said first interference-canceling stage separately comprises: a code generator for generating a spreading code and a despreading code of one of said stations; a correlator for correlating said despreading code with a one-symbol portion of said baseband signal, thereby producing a residual symbol value; an adder for adding said residual symbol value to an old estimated symbol value received from a preceding interference-canceling stage, thereby producing the estimated symbol value generated by said interference canceler; a multiplier for respreading said residual symbol value, using said spreading code, thereby generating an estimated interference signal; and a subtractor for subtracting said estimated interference signal from said one-symbol portion of said baseband signal.

Claim 32

The receiver of claim 27, wherein each interference canceler in interference-canceling stages other than said first interference-canceling stage separately comprises: a code generator for generating a spreading code and a despreading code of one of said stations; a correlator for correlating said despreading code with a one-symbol portion of said baseband signal, thereby producing a first residual symbol value; a first adder for adding said first residual symbol value to an old estimated symbol value received from a preceding interference-canceling stage, thereby producing a preliminary symbol value; an adjustment processor for adjusting said preliminary symbol value, thereby producing the estimated symbol value generated by said interference canceler; a first subtractor for subtracting from said estimated symbol value the old estimated symbol value received from said preceding interference-canceling stage, thereby producing a second residual symbol value; a multiplier for respreading said second residual symbol value, using the spreading code output by said code generator, thereby generating an estimated interference signal; and a second subtractor for subtracting said estimated interference signal from said baseband signal.

Claim 33

The receiver of claim 30, wherein said adjustment processor comprises a gain adjustment processor for dividing said preliminary symbol value by an average absolute value of a certain number of preliminary symbol values generated by said first adder.

Claim 34

The receiver of claim 30, wherein said data adjustment processor comprises a symbol adjustment processor for multiplying said preliminary symbol value by a constant value.

Claim 35

The receiver of claim 30, wherein said data adjustment processor comprises a limiter for limiting said preliminary symbol value to a certain maximum absolute value.

Claim 36

The receiver of claim 27, comprising: a respreader for respreading the estimated symbol value generated by at least one of the interference cancelers in said last stage by a corresponding spreading code, thereby generating at least one respread signal; a final adjustment processor for adding a one-symbol portion of said baseband signal, after modification by said last interference-canceling stage, to said respread signal, thereby generating a sum signal; a final correlator for correlating said sum signal with a corresponding despreading code, thereby generating a final estimated symbol value; and a decoder for decoding said final estimated symbol value.

Claim 37

The receiver of claim 34, wherein said respreader, said final adjustment processor, said final correlator and said decoder operate as described in claim 35 on all estimated symbol values generated in said last interference-canceling stage.

Claim 38

The receiver of claim 27, comprising a decoder coupled to said last interference-canceling stage, for decoding at least one of the estimated symbol values generated by said last interference-canceling stage, thus determining data transmitted by at least one of said stations.

Claim 39

The receiver of claim 36, wherein said decoder decodes all of the estimated symbol values generated in said last interference-canceling stage.

Claim 40

The receiver of claim 20, wherein said baseband processor has no interference-canceling stages other than said first interference-canceling stage, further comprising: a respreader for respreading the estimated symbol value generated by at least one of the interference cancelers in said first interference-canceling stage by a corresponding spreading code, thereby generating at least one respread signal; a final adjustment processor for adding a one-symbol portion of said baseband signal, after modification by said first interference-canceling stage, to said respread signal, thereby generating a sum signal; a final correlator for correlating said sum signal with a corresponding despreading code, thereby generating a final estimated symbol value; and a decoder for decoding said final estimated symbol value.

Claim 41

The receiver of claim 38, wherein said respreader, said final adjustment processor, said final correlator, and said decoder operate as described in claim 33 on all estimated symbol values generated in said first interference-canceling stage.

Claim 42

The receiver of claim 19, comprising a decoder for decoding at least one of the estimated symbol values generated by said baseband processor to determine data transmitted by at least one of said stations.

Claim 43

The receiver of claim 40, wherein said decoder comprises a Viterbi decoder.

Claim 44

The receiver of claim 19, comprising a pair of baseband processors as described in claim 18, wherein said front-end circuit generates a pair of baseband signals, which are provided to respective baseband processors and processed as described in claim 18.

Claim 45

The receiver of claim 42, comprising a combining circuit for combining pairs of estimated symbol values output by respective baseband processors.

Claim 46

The receiver of claim 19, wherein: said baseband processor obtains different estimated symbol values for a single symbol transmitted from a single station over different paths; and said baseband processor comprises a path-combining processor for combining said different estimated symbol values.

Claim 47

The receiver of claim 19, wherein said front-end circuit receives a radio-frequency code-division multiple-access signal from an antenna and converts it to said baseband signal.

Claim 48

The receiver of claim 19, wherein said front-end circuit receives a radio-frequency code-division multiple-access signal from a power line and converts it to said baseband signal.

Claim 49

The receiver of claim 19, wherein said front-end circuit receives an optical code-division multiple-access signal and converts it to an electrical baseband signal.

Claim 50

The receiver of claim 19, wherein said front-end circuit receives an acoustic code-division multiple-access signal and converts it to an electrical baseband signal.

Claim 51

A code-division multiple-access receiver for receiving a code-division multiple-access signal combining signals of a plurality of stations, each station having a different spreading code and a corresponding despreading code, comprising: a front-end circuit for converting said code-division multiple-access signal to a baseband signal; a shift register coupled to said front-end circuit, for receiving, storing, and shifting said baseband signal; a controller coupled to said front-end circuit, for recognizing symbol boundaries in said baseband signal; a symbol memory for storing estimated symbol values; and a baseband processor coupled to said shift register and said symbol memory, for reading from said shift register a part of said baseband signal corresponding to one symbol, generating a spreading code by which said symbol was spread, generating a corresponding despreading code, using said part of said baseband signal and said despreading code to generate an estimated symbol value storing said estimated symbol value in said symbol memory, using said spreading code to generate an estimated interference signal, and modifying said part of said baseband signal in said shift register by subtracting said estimated interference signal.

Claim 52

A code-division multiple-access receiver for receiving a code-division multiple-access signal combining signals of a plurality of stations, each station having a different spreading code and a corresponding despreading code, comprising: a front-end circuit for converting said code-division multiple-access signal to a baseband signal; a shift register coupled to said front-end circuit, for receiving, storing, and shifting said baseband signal; a controller coupled to said front-end circuit, for recognizing symbol boundaries in said baseband signal; a symbol memory for storing estimated symbol values; and a baseband processor coupled to said shift register and said symbol memory, for reading from said shift register a part of said baseband signal corresponding to one symbol, generating a spreading code by which said symbol was spread, generating a corresponding despreading code, using said part of said baseband signal and said despreading code to generate an estimated symbol value storing said estimated symbol value in said symbol memory, using said spreading code to generate an estimated interference signal, and modifying said part of said baseband signal in said shift register by subtracting said estimated interference signal.

Claim 53

The receiver of claim 49, wherein said baseband processor comprises an interference canceler having: a code generator for generating said spreading code and said corresponding despreading code; a correlator for correlating said despreading code with said part of said baseband signal, thereby producing a residual symbol value; an adder for adding said residual symbol value to an old estimated symbol value stored in said symbol memory, thereby generating the estimated symbol value referred to in claim 48, which is stored in said symbol memory in place of said old estimated symbol value: a multiplier for respreading said residual symbol value, using the spreading code output by said code generator, thereby generating said estimated interference signal; and a subtractor for subtracting said estimated interference signal from said part of said baseband signal.

Claim 54

The receiver of claim 49, wherein said baseband processor comprises an interference canceler having: a code generator for generating said spreading code and said corresponding despreading code; a correlator for correlating said despreading code with said part of said baseband signal, thereby producing a first residual symbol value; a first adder for adding said first residual symbol value to an old estimated symbol value stored in said symbol memory, thereby producing a preliminary symbol value; an adjustment processor for adjusting said preliminary symbol value to produce a new estimated symbol value; a first subtractor for subtracting said old estimated symbol value from said new estimated symbol value, thereby producing a second residual symbol value; a multiplier for respreading said second residual symbol value, using the spreading code output by said code generator, thereby generating said estimated interference signal; and a second subtractor for subtracting said estimated interference signal from said part of said baseband signal; said new estimated symbol value being stored in said symbol memory In place of said old estimated symbol value.

Claim 55

The receiver of claim 51, wherein said adjustment processor comprises a gain adjustment processor for dividing said preliminary symbol value by an average absolute value of a certain number of preliminary symbol values produced by said first adder.

Claim 56

The receiver of claim 51, wherein said data adjustment processor comprises a symbol adjustment processor for multiplying said preliminary symbol value by a constant value.

Claim 57

The receiver of claim 51, wherein said data adjustment processor comprises a limiter for limiting said new estimated symbol value to a certain maximum absolute value.

Claim 58

The receiver of claim 49, wherein said baseband processor also comprises: a respreader for respreading an estimated symbol value stored in said symbol memory, using a spreading code of a corresponding station, thereby producing a respread signal; a final adjustment processor for adding a final part of the baseband signal stored in said shift register to said respread signal, thereby producing a sum signal; and a final correlator for correlating said sum signal with the despreading code of said corresponding station, thereby generating an adjusted value of the estimated symbol value respread by said respreader.

Claim 59

The receiver of claim 49, wherein: said shift register is divided into stages, each stage holding a part of said baseband signal corresponding to one symbol.

Claim 60

The receiver of claim 56, wherein said symbol memory stores one estimated symbol value per station for each of said stages.

Claim 61

The receiver of claim 56, wherein said symbol memory stores more than one estimated symbol value per station for each of said stages, thereby providing path diversity.

Claim 62

The receiver of claim 56, comprising a decoder for decoding estimated symbol values stored in said symbol memory which correspond to the baseband signal stored in a last stage of said shift register.

Claim 63

The receiver of claim 49, wherein said despreading codes are identical to said spreading codes.