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US5572069A Expired / Lapsed US ⏱️ 0.0 years remaining

Conductive epoxy grid array semiconductor packages

Assignee: LSI Corp
•
Filing: 1995-04-27
•
Granted: 1996-11-05
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Expires: 2015-04-27
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Abstract

Abstract A semiconductor device assembly utilizing a grid array of conductive epoxy for connecting it to an electronic system. Conductive epoxy is screen printed in a desired pattern onto a printed wire board of the semiconductor device assembly. The conductive epoxy is B-staged by heating in an oven. The semiconductor device assembly is then placed onto a system printed circuit board wherein the B-staged conductive epoxy is further cured by heat and effectively makes mechanical and electrical connections between the semiconductor device assembly and the system printed circuit board.

Inventors

  • 👤 Mark Schneider

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 00:49
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/701; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/321; H10W70/00; H10W70/01; H10W70/05; H10W70/098; H10W70/099; H05K1/00; H05K1/18; H05K1/181; H05K2201/00; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10719; H05K2201/10954; H05K2201/10984; H05K2203/00; H05K2203/11; H05K2203/1105; H05K3/10; H05K3/12; H05K3/1216; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 163 words
A semiconductor device assembly, comprising: a planar substrate having a top surface, a bottom surface and an attachment area for a semiconductor device, each surface having conductive paths disposed thereon; a semiconductor device having electronic circuits and attachment pads connected thereto; said semiconductor device attached to said planar substrate; said semiconductor device attachment pads connected to some of said planar substrate conductive paths; connection pads disposed on a surface of said planar substrate and connected to some of the conductive paths thereon; encapsulation coveting said semiconductor device and planar substrate attachment area; and conductive epoxy contacts disposed on said connection pads, wherein some of the conductive paths are interconnected in a desired pattern so that said semiconductor device attachment pads are in electrical communication with the desired conductive epoxy contacts, wherein the conductive epoxy contacts are B-staged and ready for attachment to a system printed circuit board without the need for further means of attachment or connection to the system printed circuit board.
Claim 2
Dependent Claim 163 words
A semiconductor device assembly, comprising: a planar substrate having a top surface, a bottom surface and an attachment area for a semiconductor device, each surface having conductive paths disposed thereon; a semiconductor device having electronic circuits and attachment pads connected thereto; said semiconductor device attached to said planar substrate; said semiconductor device attachment pads connected to some of said planar substrate conductive paths; connection pads disposed on a surface of said planar substrate and connected to some of the conductive paths thereon; encapsulation coveting said semiconductor device and planar substrate attachment area; and conductive epoxy contacts disposed on said connection pads, wherein some of the conductive paths are interconnected in a desired pattern so that said semiconductor device attachment pads are in electrical communication with the desired conductive epoxy contacts, wherein the conductive epoxy contacts are B-staged and ready for attachment to a system printed circuit board without the need for further means of attachment or connection to the system printed circuit board.
Claim 3
Dependent Claim 26 words
The semiconductor device assembly of claim 1, wherein said planar substrate is a printed wire board having top and bottom conductive traces for the conductive paths.
Claim 4
Dependent Claim 16 words
The semiconductor device assembly of claim 1, wherein said semiconductor device is an integrated circuit die.
Claim 5
Dependent Claim 18 words
The semiconductor device assembly of claim 1, wherein said semiconductor device is a plurality of integrated circuit dice.
Claim 6
Dependent Claim 37 words
The semiconductor device assembly of claim 1, wherein some of said planar substrate conductive paths on the top surface are connected to some of the conductive paths on the bottom surface by vias extending through the substrate.
Claim 7
Dependent Claim 12 words
The semiconductor device assembly of claim 1, wherein said encapsulation is epoxy.
Claim 8
Dependent Claim 13 words
The semiconductor device assembly of claim 1, wherein said encapsulation is thermosetting plastic.
Claim 9
Dependent Claim 24 words
The semiconductor device assembly of claim 1, wherein said epoxy contacts are arranged in an array on the bottom surface of said planar substrate.
Claim 10
Dependent Claim 17 words
The semiconductor device assembly of claim 8, wherein said epoxy contacts are arranged in a rectangular array.

References Cited (Backward Citations)

US3793709A Cited
US4661192A Cited
US5468681A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-11-05 2000-05-06 2000-11-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-11-05 2004-05-06 2004-11-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-11-05 2008-05-06 2008-11-05 $7700.00 Window Closed / Lapsed

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