Optical detection and signal conditioning package

Claim 2

A packaging assembly for mounting and aligning a focus and tracking photo detector array and front facet detectors to an optical read/write head comprising: a flat elongated leadframe having a plurality of conductive fingers extending substantially orthogonal to the longitudinal axis of said leadframe and having conductive wing areas extending along said longitudinal axis to opposite ends of said elongated leadframe, said conductive wing areas having alignment indicia for aligning a focus and tracking photo detector array to the optical read/write head; a ceramic substrate conductively attached to said leadframe; a focus and tracking photo detector array conductively attached to said ceramic substrate and to the conductive fingers of said leadframe; and a front facet detector conductively attached to said ceramic substrate and to the conductive fingers of said leadframe.

Claim 3

The packaging assembly of claim 1, and further comprising: an ASIC containing a plurality of amplifiers for receiving signals from said focus and tracking photo detector array and said front facet detector and for conditioning the received signals.

Claim 4

The packaging assembly of claim 1 wherein the focus and tracking photo detector array is comprised of matched cross coupled quad detectors and focus and tracking pre-amps with said pre-amps comprised of four monolithically fabricated pre-amps that are closely matched.

Claim 5

An integrated optical detection and signal conditioning package, particularly adapted for use as part of an optical recording system's read/write head, comprising: a monolithic optical detector array comprised of; a first and a second set of quadrature cells with cells of said first and second sets electrically cross-coupled to form four outputs which relate to focus and tracking error signals, at least one detector element the output of which relates to a front facet signal, at least one detector element the output of which relates to the output of a dark diode; a plurality of output pins electrically connected to said circuit interconnections of said substrate; a monolithic ASIC comprised of; at least two tightly matched preamplifiers having inputs and outputs, with the inputs electrically attached to at least two outputs relating to focus and tracking error signals of said monolithic optical detector array, a first set of at least two less tightly matched preamplifiers, having inputs and outputs, with the inputs electrically attached to at least two outputs relating to focus and tracking signals of said monolithic optical detector array, which outputs are electrically attached to package output pins relating to focus and tracking signals which will be summed, differenced, and/or normalized off the head, a second set of at least two tightly matched preamplifiers having inputs and outputs, with the inputs electrically attached to one output relating to a front facet signal of said monolithic optical detector array, and outputs of which are electrically attached to package output pins relating to a front facet HI signal for read power level determination and a front facet LO signal for write power level determination, at least one preamplifier having inputs and outputs, with the inputs electrically attached to all detector generated outputs relating to focus and tracking signals of said monolithic detector array, and whose outputs are electrically attached to package output pins relating to a RF SUM signal.

Claim 6

An integrated optical detection and signal conditioning package, particularly adapted for use as part of an optical recording system's read/write head, comprising: a monolithic optical detector array comprised of; a first and a second set of quadrature cells with cells of said first and second sets electrically cross-coupled to form four outputs which relate to focus and tracking error signals, at least one detector element the output of which relates to a front facet signal, at least one detector element the output of which relates to the output of a dark diode; a plurality of output pins electrically connected to said circuit interconnections of said substrate; a monolithic ASIC comprised of; at least two tightly matched preamplifiers having inputs and outputs, with the inputs electrically attached to at least two outputs relating to focus and tracking error signals of said monolithic optical detector array, a first set of at least two less tightly matched preamplifiers, having inputs and outputs, with the inputs electrically attached to at least two outputs relating to focus and tracking signals of said monolithic optical detector array, which outputs are electrically attached to package output pins relating to focus and tracking signals which will be summed, differenced, and/or normalized off the head, a second set of at least two tightly matched preamplifiers having inputs and outputs, with the inputs electrically attached to one output relating to a front facet signal of said monolithic optical detector array, and outputs of which are electrically attached to package output pins relating to a front facet HI signal for read power level determination and a front facet LO signal for write power level determination, at least one preamplifier having inputs and outputs, with the inputs electrically attached to all detector generated outputs relating to focus and tracking signals of said monolithic detector array, and whose outputs are electrically attached to package output pins relating to a RF SUM signal.