US5563524A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for testing electric circuits
Assignee: A T E Solutions Inc
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Filing: 1995-03-02
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Granted: 1996-10-08
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Expires: 2015-03-02
Abstract
Abstract Universal test apparatus for automatically testing electric circuits. A host computer communicates with the apparatus through a first interface. A unit under test communicates with the apparatus through a second interface. The apparatus has a plurality of multifunctional storage registers. Responsive to commands from the host computer the individual registers are alternatively configured to receive drive signals through the first interface from the host computer, to receive response signals through the second interface from the unit under test, to receive signals transferred from another register, and to transfer signals to another register. Drive signals stored in a register transmitted to the unit under test and response signals stored in a function of the host computer is performed by one or more microprocessors which comprise part of the electric circuits being tested.
Inventors
- 👤 Louis Y. Ungar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 21:05
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/273; G06F11/2733; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/31903; G01R31/31905
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
120 words
Universal test apparatus for automatically testing electronic circuits, the apparatus comprising: a first interface for communicating with a host computer that controls the apparatus; a second interface for communicating with a unit under test; a plurality of storage registers; means responsive to commands from the host computer for configuring the individual registers alternatively to receive drive signals through the first interface from the host computer, to receive response signals through the second interface from the unit under test, to receive signals transferred from another register, or to transfer signals to another register; means for transmitting drive signals stored in a register to the unit under test; and means for transmitting response signals stored in a register to the host computer.
Claim 2
Dependent Claim
120 words
Universal test apparatus for automatically testing electronic circuits, the apparatus comprising: a first interface for communicating with a host computer that controls the apparatus; a second interface for communicating with a unit under test; a plurality of storage registers; means responsive to commands from the host computer for configuring the individual registers alternatively to receive drive signals through the first interface from the host computer, to receive response signals through the second interface from the unit under test, to receive signals transferred from another register, or to transfer signals to another register; means for transmitting drive signals stored in a register to the unit under test; and means for transmitting response signals stored in a register to the host computer.
Claim 3
Dependent Claim
28 words
The apparatus of claim 1, in which the configuring means configures the individual registers to perform a signature analysis on response signals received from the unit under test.
Claim 4
Dependent Claim
29 words
The apparatus of claim 1, in which the configuring means configures the individual registers to directly transmit to the host computer response signals received from the unit under test.
Claim 5
Dependent Claim
25 words
The apparatus of claim 1, in which the configuring means configures the individual registers to spot check response signals received from the unit under test.
Claim 6
Dependent Claim
24 words
The apparatus of claim 1, in which the configuring means configures the individual registers to bypass response signals received from the unit under test.
Claim 7
Dependent Claim
24 words
The apparatus of claim 1, in which the configuring means configures the individual registers to transmit directly drive signals to the unit under test.
Claim 8
Dependent Claim
33 words
The apparatus of claim 1, in which the configuring means configures the individual registers to modify drive signals received from the host computer and transmit the modified signals to the unit under test.
Claim 9
Dependent Claim
24 words
The apparatus of claim 1, in which the configuring means configures the individual registers to bypass the drive signals to the unit under test.
Claim 10
Dependent Claim
35 words
The apparatus of claim 1, in which the configuring means configures the individual registers to transmit a drive signal burst to the unit under test responsive to a command drive signal from the host computer.
Claim 11
Dependent Claim
36 words
The apparatus of claim 1, in which the registers are arranged in a sequence and the configuring means configures the individual registers to shift the contents of one register to the next register in the sequence.
Claim 12
Dependent Claim
36 words
The apparatus of claim 1, in which the registers are arranged in a sequence and the configuring means configures the individual registers to shift the contents of one register to, the last register in the sequence.
Claim 13
Dependent Claim
21 words
The apparatus of claim 1, in which the second interface comprises a plurality of outputs equal in number to the registers.
Claim 14
Dependent Claim
98 words
An electronic system having a built-in automatic test capability comprising: a plurality of test nodes; a plurality of storage registers; a host computer; means responsive to commands from the host computer for configuring the individual registers alternatively to receive drive signals from the host computer, to receive response signals from one of the test nodes, to receive signals transferred from another register, or to transfer signals to another register; means for transmitting drive signals stored in a register to one of the test nodes; and means for transmitting response signals stored in a register to the host computer.
Claim 15
Dependent Claim
98 words
An electronic system having a built-in automatic test capability comprising: a plurality of test nodes; a plurality of storage registers; a host computer; means responsive to commands from the host computer for configuring the individual registers alternatively to receive drive signals from the host computer, to receive response signals from one of the test nodes, to receive signals transferred from another register, or to transfer signals to another register; means for transmitting drive signals stored in a register to one of the test nodes; and means for transmitting response signals stored in a register to the host computer.
Claim 16
Dependent Claim
39 words
The electronic system of claim 13, in which the nodes are located on a printed circuit board and the registers, the configuring means, and the transmitting means are housed in an integrated circuit mounted on the printed circuit board.
Claim 17
Dependent Claim
33 words
The electronic system of claim 13, in which the nodes and the host computer are located on a printed circuit board and the host computer is programmed to perform operations of the system.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-10-08 | 2000-04-08 | 2000-10-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-10-08 | 2004-04-08 | 2004-10-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-10-08 | 2008-04-08 | 2008-10-08 | $7700.00 | Window Closed / Lapsed |