Computer system selecting byte lane for a peripheral device during I/O addressing technique of disabling non-participating peripherals by driving an address within a range on the local bus in a DMA controller

Claim 1

A computer system comprising: a local bus; a microprocessor coupled to said local bus; a system memory coupled to said local bus; and a direct memory access (DMA) controller coupled to said local bus and including: a memory address register for storing a value indicative of a memory address; said memory address register having an address which falls in a DMA configuration address range and functions as one of a plurality of configuration registers; said configuration registers are configured to receive initialization data; a mode register, as part of the said configuration registers, for storing information indicative of direction of a DMA operation; and a control circuit, coupled to said configuration registers, and for executing a memory access cycle during which said value representing said memory address is driven on said local bus and for executing, after the receipt of the initialization data, an I/O access cycle during which an address value within the said DMA configuration address range is driven on said local bus, wherein at least one low order addressing bit of said address value is encoded with byte lane information; and a peripheral device operatively coupled to said local bus and responsive to said I/O access cycle, wherein said peripheral device includes: a data buffer; and a multiplexer capable of coupling data between a predetermined byte lane of said local bus and said data buffer according to said byte lane information.

Claim 15

A method for controlling a direct memory access (DMA) operation within a computer system including a system memory, a DMA controller having a plurality of configuration registers which fall in a DMA configuration address range, and a peripheral device coupled to a local bus, said method comprising the steps of: receiving configuration information including information indicative of a memory address within said DMA controller; storing said configuration information in said configuration registers of said DMA controller by addressing said DMA controller with address values within said DMA configuration address range; executing a memory access cycle to access a predetermined memory location within said system memory during which said memory address is driven on said local bus; and executing an I/O access cycle, after storing said configuration information in said configuration registers,during which an address value within said DMA configuration address range is driven on said local bus, wherein at least one lower order addressing bit of said address value contains encoded byte lane information; and transferring a byte of data between a predetermined byte lane of said local bus and said peripheral device according to said encoded byte lane information.

Claim 16

A method for controlling a direct memory access (DMA) operation within a computer system including a system memory, a DMA controller having a plurality of configuration registers which fall in a DMA configuration address range, and a peripheral device coupled to a local bus, said method comprising the steps of: receiving configuration information including information indicative of a memory address within said DMA controller; storing said configuration information in said configuration registers of said DMA controller by addressing said DMA controller with address values within said DMA configuration address range; executing a memory access cycle to access a predetermined memory location within said system memory during which said memory address is driven on said local bus; and executing an I/O access cycle, after storing said configuration information in said configuration registers,during which an address value within said DMA configuration address range is driven on said local bus, wherein at least one lower order addressing bit of said address value contains encoded byte lane information; and transferring a byte of data between a predetermined byte lane of said local bus and said peripheral device according to said encoded byte lane information.