US5559562A
Expired / Lapsed
US
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MPEG editor method and apparatus
Assignee: SIMON SYSTEMS Inc
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Filing: 1994-11-01
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Granted: 1996-09-24
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Expires: 2014-11-01
Abstract
Abstract A method and apparatus for editing MPEG formatted image representative electrical signals provides a first decoder and storage for storing components of a first MPEG formatted stream of image data, a second decoder and storage for storing components of a second MPEG formatted stream of image data, and transition circuitry responsive to a transition position value, which designates where the transition is to begin, for generating an edited video stream which represents the transitioning from the first video sequence to the second video sequence. Different transition formats can be effected, including for example, an abrupt transition, a dissolve, or DVE.
Inventors
- 👤 William Ferster
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 08:49
CPC Classifications
G; G11; G11B; G11B27/00; G11B27/02; G11B27/031; G11B27/034; H; H04; H04N; H04N19/00; H04N19/10; H04N19/102; H04N19/103; H04N19/107; H04N21/00; H04N21/20; H04N21/23; H04N21/234; H04N21/23424; H04N5/00; H04N5/222; H04N5/262
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
197 words
Apparatus for editing MPEG formatted image representative electrical signals comprising first storage for storing components of a first MPEG formatted stream of image data, second storage for storing components of a second MPEG formatted stream of image data, transition circuitry responsive to a transition position value representing a transition position for generating an edited video stream of image data representing the first MPEG formatted stream of image data prior to the transition position and, at least in part, said second MPEG formatted stream of image data subsequent to said transition position, said transition circuitry comprising a register for storing said transition position value, a register for storing a transition mode, a first frame decoder circuitry for decoding and playing a current frame first image for said first image data, a second frame decoder circuitry for decoding and playing a current frame second image for said second image data, and selective addition circuitry for selectively adding, in response to said transition mode register value and said transition position register value, a first variable fraction of each current frame first image and a second variable fraction of a corresponding current frame second image to generate said edited video stream.
Claim 2
Dependent Claim
197 words
Apparatus for editing MPEG formatted image representative electrical signals comprising first storage for storing components of a first MPEG formatted stream of image data, second storage for storing components of a second MPEG formatted stream of image data, transition circuitry responsive to a transition position value representing a transition position for generating an edited video stream of image data representing the first MPEG formatted stream of image data prior to the transition position and, at least in part, said second MPEG formatted stream of image data subsequent to said transition position, said transition circuitry comprising a register for storing said transition position value, a register for storing a transition mode, a first frame decoder circuitry for decoding and playing a current frame first image for said first image data, a second frame decoder circuitry for decoding and playing a current frame second image for said second image data, and selective addition circuitry for selectively adding, in response to said transition mode register value and said transition position register value, a first variable fraction of each current frame first image and a second variable fraction of a corresponding current frame second image to generate said edited video stream.
Claim 3
Dependent Claim
18 words
The apparatus of claim 1 wherein said first fraction and said second fraction sum to one in value.
Claim 4
Dependent Claim
36 words
The apparatus of claim 1 wherein each said decoder circuitry comprises an MPEG decoder circuitry for respectively generating a said first or second current frame image using a previous key frame and all intervening updating frames.
Claim 5
Dependent Claim
25 words
The apparatus of claim 3 wherein said transition circuitry further comprises an encoding circuitry for generating said edited video stream as an NTSC formatted signal.
Claim 6
Dependent Claim
17 words
The apparatus of claim 2 wherein said first fraction is zero and said second fraction is one.
Claim 7
Dependent Claim
43 words
The apparatus of claim 2 wherein said addition circuitry decreases the value of said first fraction over the range from one to zero over a plurality of frames, and increases the value of the second fraction over the range from zero to one.
Claim 8
Dependent Claim
171 words
Apparatus for editing MPEG formatted image representative electrical signals comprising a fifo memory for storing components of a first MPEG formatted stream of image data and a second MPEG formatted stream of image data, a fifo access control circuitry connected to the fifo memory for retrieving image data from the fifo memory, a first MPEG frame decoder circuitry for decoding and playing a current frame first image, a second MPEG frame decoder circuitry for decoding and playing a current frame second image, said first and second frame decoder circuitry each being connected to said fifo access control circuitry, an editor/encoder circuitry, connected to said first and second decoder circuities, a digital signal processor connected to said fifo memory, said fifo access control circuitry, said first and second MPEG decoders, and said editor/encoder circuitry for effecting, in response to control signals from a host computer over a host interface, the transitioning of a first image data sequence representing a first image video to a second data sequence representing a second image video.
Claim 9
Dependent Claim
171 words
Apparatus for editing MPEG formatted image representative electrical signals comprising a fifo memory for storing components of a first MPEG formatted stream of image data and a second MPEG formatted stream of image data, a fifo access control circuitry connected to the fifo memory for retrieving image data from the fifo memory, a first MPEG frame decoder circuitry for decoding and playing a current frame first image, a second MPEG frame decoder circuitry for decoding and playing a current frame second image, said first and second frame decoder circuitry each being connected to said fifo access control circuitry, an editor/encoder circuitry, connected to said first and second decoder circuities, a digital signal processor connected to said fifo memory, said fifo access control circuitry, said first and second MPEG decoders, and said editor/encoder circuitry for effecting, in response to control signals from a host computer over a host interface, the transitioning of a first image data sequence representing a first image video to a second data sequence representing a second image video.
Claim 10
Dependent Claim
43 words
The apparatus of claim 7 further comprising host interface circuitry connected to the first and second fifo memories, and to said digital signal processor, for transmitting image data and control information from a host processor and host memory to said other connected elements.
Claim 11
Independent Claim
181 words
A method for editing MPEG formatted image representative electrical signals comprising the steps of storing components of a first MPEG formatted stream of image data, storing components of a second MPEG formatted stream of image data, and generating in response to a transition position value, representing a transition position, an edited video stream of image data representing the first MPEG formatted stream of image data prior to the transition position and, at least in part, said second MPEG formatted stream of image data subsequent to said transition position, wherein said generating step comprises the steps of storing said transition position value, storing a transition mode designation, decoding and playing a current frame first image for said first image data, decoding and playing a current frame second image for said second image data, and selectively adding, beginning at the transition position, in response to said transition mode designation value and the transition position value, a first variable fraction of each current frame first image and a second variable fraction of a corresponding current frame second image to generate said edited video stream.
Claim 12
Independent Claim
181 words
A method for editing MPEG formatted image representative electrical signals comprising the steps of storing components of a first MPEG formatted stream of image data, storing components of a second MPEG formatted stream of image data, and generating in response to a transition position value, representing a transition position, an edited video stream of image data representing the first MPEG formatted stream of image data prior to the transition position and, at least in part, said second MPEG formatted stream of image data subsequent to said transition position, wherein said generating step comprises the steps of storing said transition position value, storing a transition mode designation, decoding and playing a current frame first image for said first image data, decoding and playing a current frame second image for said second image data, and selectively adding, beginning at the transition position, in response to said transition mode designation value and the transition position value, a first variable fraction of each current frame first image and a second variable fraction of a corresponding current frame second image to generate said edited video stream.
Claim 13
Dependent Claim
18 words
The method of claim 9 wherein said first fraction and said second fraction sum to one in value.
Claim 14
Dependent Claim
33 words
The method of claim 9 wherein said decoding steps each comprise the step of generating a said first or second current frame image using a previous key frame and all intervening updating frames.
Claim 15
Dependent Claim
23 words
The method of claim 11 wherein said generating step comprises the step of generating said edited video stream as an NTSC formatted signal.
Claim 16
Dependent Claim
17 words
The method of claim 10 wherein said first fraction is zero and said second fraction is one.
Claim 17
Dependent Claim
40 words
The method of claim 10 wherein said first fraction decreases from one to zero during the processing of a plurality of frames and said second fraction increases from zero to one over a plurality of frames to effect a dissolve.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-24 | 2000-03-25 | 2000-09-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-24 | 2004-03-25 | 2004-09-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-24 | 2008-03-25 | 2008-09-24 | $7700.00 | Window Closed / Lapsed |