Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
119 words
A repeater having a link integrity test disabling feature, comprising: an integrated multiport repeater for receiving signals and for retransmitting the received signals, the multiport repeater having a plurality of ports and a control means for receiving data signals and outputting a control signal; a link integrity test circuit coupled to a particular one of the plurality of ports for implementing a link integrity test for the particular one port; and linktest control means, coupled to the link integrity test circuit and to the control means, for disabling the link integrity test circuit for the particular one port in response to the control signal when the particular one port is connected to a node that does not generate linkbeats.
Claim 2
Dependent Claim
119 words
A repeater having a link integrity test disabling feature, comprising: an integrated multiport repeater for receiving signals and for retransmitting the received signals, the multiport repeater having a plurality of ports and a control means for receiving data signals and outputting a control signal; a link integrity test circuit coupled to a particular one of the plurality of ports for implementing a link integrity test for the particular one port; and linktest control means, coupled to the link integrity test circuit and to the control means, for disabling the link integrity test circuit for the particular one port in response to the control signal when the particular one port is connected to a node that does not generate linkbeats.
Claim 3
Dependent Claim
155 words
A repeater, comprising: an integrated multiport repeater for receiving signals and for retransmitting the received signals, the multiport repeater having a plurality of ports and a control means for receiving data signals and outputting a first control signal; a link integrity test circuit coupled to a particular one of the plurality of ports for implementing a link integrity test for the particular one port and for disabling the particular port for nonreceipt of a plurality of linktest pulses; linktest control means, coupled to the link integrity test circuit and responsive to a second control signal, for inhibiting the disablement of the particular port by the link integrity test circuit for nonreceipt of a plurality of linktest pulses; and a memory associated with the particular one port and coupled to the control means and responsive to the first control signal for outputting the second control signal in response to the output of the first control signal.
Claim 4
Dependent Claim
155 words
A repeater, comprising: an integrated multiport repeater for receiving signals and for retransmitting the received signals, the multiport repeater having a plurality of ports and a control means for receiving data signals and outputting a first control signal; a link integrity test circuit coupled to a particular one of the plurality of ports for implementing a link integrity test for the particular one port and for disabling the particular port for nonreceipt of a plurality of linktest pulses; linktest control means, coupled to the link integrity test circuit and responsive to a second control signal, for inhibiting the disablement of the particular port by the link integrity test circuit for nonreceipt of a plurality of linktest pulses; and a memory associated with the particular one port and coupled to the control means and responsive to the first control signal for outputting the second control signal in response to the output of the first control signal.
Claim 5
Dependent Claim
21 words
The repeater of claim 2 wherein each of a plurality of memories are coupled to one of the plurality of ports.
Claim 6
Dependent Claim
50 words
The repeater of claim 3 wherein each of the plurality of memories respond separately to control information to individually disable the link integrity test for each one of the plurality of ports when each one of the plurality of parts are connected to a node that does not generate linkbeats.
Claim 7
Dependent Claim
38 words
The repeater of claim 2 wherein the memory is further responsive to the data signals to deassert the first control signal and thereby reenable linktest reception for the particular one port when the particular port requires linkbeat reception.
Claim 8
Independent Claim
120 words
A method of disabling a link integrity test function on a port of a multiport repeater while maintaining participation of the port on a network, comprising the steps of: receiving control information at a circuit, the circuit including a port and a linktest control circuit coupled to the port for controlling the reception of a linktest pulse; if the control information indicates the reception of the linktest pulse for the port is to be disabled, outputting a first control signal from a memory associated with the port and coupled to the linktest control circuit; and outputting a second control signal to the port from the linktest control circuit if the port is to be disabled from receiving the linktest pulse.
Claim 9
Independent Claim
120 words
A method of disabling a link integrity test function on a port of a multiport repeater while maintaining participation of the port on a network, comprising the steps of: receiving control information at a circuit, the circuit including a port and a linktest control circuit coupled to the port for controlling the reception of a linktest pulse; if the control information indicates the reception of the linktest pulse for the port is to be disabled, outputting a first control signal from a memory associated with the port and coupled to the linktest control circuit; and outputting a second control signal to the port from the linktest control circuit if the port is to be disabled from receiving the linktest pulse.