US5548588A
Expired / Lapsed
US
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Method and apparatus for switching, multicasting multiplexing and demultiplexing an ATM cell
Assignee: Ericsson AB
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Filing: 1995-01-31
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Granted: 1996-08-20
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Expires: 2015-01-31
Abstract
Abstract The present invention pertains to an apparatus for manipulating ATM cells. The apparatus comprises a memory array in which an entire ATM cell can be read or written in one read or write cycle. The apparatus is also comprised of a mechanism for reading or writing the entire ATM cell from or into the memory array. The present invention pertains to a method for switching an ATM cell. The method comprises the steps of receiving the ATM cell at a first input port of a switch from the ATM network. Then there can be the step of storing the ATM cell in one clock cycle in a memory array of the switch. Next there is the step of reading the ATM cell in the memory array in one clock cycle. Next there is the step of transferring the ATM cell from the memory array to a first output port of the switch. Next there is the step of transmitting the ATM cell from the first output port to the ATM network. The present invention pertains to a switch for an ATM cell. The switch comprises I input ports which receive ATM cells from an ATM network, where I>/=1 and is an integer. The switch is also comprised of a memory array connected to the I input ports for storing an ATM cell received by one of the I input ports in one clock cycle. The switch also comprises O output ports connected to the memory array, where O>/=1 and is an integer. One of the O output ports transmit an ATM cell which is received from the memory array to the ATM network. Additionally, the switch comprises a controller connected to the memory array, I input ports and O output ports for controlling the storage of an ATM cell from one of the input ports into the memory array in one clock cycle. The switch can be used for normal switching operation, multicasting, demultiplexing or multiplexing.
Inventors
- 👤 Mahesh N. Ganmukhi
- 👤 Brian L. Jordan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 22:14
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L49/00; H04L49/10; H04L49/104; H04L49/105; H04L49/108; H04L49/20; H04L49/201; H04L49/203; H04L49/30; H04L49/3081; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04L2012/5672
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
91 words
A method for multicasting an ATM cell comprising the steps of: receiving the ATM cell at a first input port of a switch from an ATM network; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; transmitting the ATM cell from the switch to the ATM network; reading again the ATM cell in the memory array in one clock cycle; and transmitting again the ATM cell from the switch to the ATM network.
Claim 2
Independent Claim
91 words
A method for multicasting an ATM cell comprising the steps of: receiving the ATM cell at a first input port of a switch from an ATM network; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; transmitting the ATM cell from the switch to the ATM network; reading again the ATM cell in the memory array in one clock cycle; and transmitting again the ATM cell from the switch to the ATM network.
Claim 3
Dependent Claim
32 words
A method as described in claim 1 including after the reading the ATM cell step, there is the step of transferring the ATM cell to a first output port of the switch.
Claim 4
Dependent Claim
34 words
A method as described in claim 2 including after the reading again the ATM cell step, there is the step of transferring again the ATM cell to the first output port of the switch.
Claim 5
Dependent Claim
34 words
A method as described in claim 2 including after the reading again the ATM cell step, there is the step of transferring again the ATM cell to a second output port of the switch.
Claim 6
Dependent Claim
128 words
A multicast switch for an ATM cell comprising: a first input port which receives the ATM cell from an ATM network; a memory array connected to the first input port for storing the ATM cell in one clock cycle; a first output port connected to the memory array, said ATM cell is transmitted to the ATM network through the first output port; and a controller connected to the memory array, first input port and second output port for controlling the storage of the ATM cell in the first input in the memory array in one clock cycle, and the number of N copies, where N≧2 and is an integer, of the ATM cell that are provided to the first output port, said controller also produces the clock cycle.
Claim 7
Dependent Claim
128 words
A multicast switch for an ATM cell comprising: a first input port which receives the ATM cell from an ATM network; a memory array connected to the first input port for storing the ATM cell in one clock cycle; a first output port connected to the memory array, said ATM cell is transmitted to the ATM network through the first output port; and a controller connected to the memory array, first input port and second output port for controlling the storage of the ATM cell in the first input in the memory array in one clock cycle, and the number of N copies, where N≧2 and is an integer, of the ATM cell that are provided to the first output port, said controller also produces the clock cycle.
Claim 8
Dependent Claim
58 words
A multicast switch as described in claim 5 including a second output port connected to the controller and the memory array, said ATM cell is transmitted to the ATM network through the first output port, said controller controlling the number of copies of the ATM cell in the memory array that are provided to the second output port.
Claim 9
Dependent Claim
44 words
A multicast switch as described in claim 6 wherein the controller includes an external controller which produces the clock cycle and address information regarding the ATM cell in the memory array, said external controller connected to the input and output ports and memory array.
Claim 10
Dependent Claim
30 words
A multicast switch as described in claim 7 wherein the controller includes an internal controller that controls the input and output ports and the memory array, and is connected therewith.
Claim 11
Dependent Claim
27 words
A multicast switch as described in claim 8 wherein the internal controller includes a W-state machine connected to the input and output ports and the memory array.
Claim 12
Dependent Claim
15 words
A multicast switch as described in claim 9 wherein the input port includes a CVU.
Claim 13
Dependent Claim
15 words
A multicast switch as described in claim 10 wherein the output port includes a CDU.
Claim 14
Independent Claim
123 words
A method for switching an ATM cell comprising the steps of: receiving J portions of the ATM cell at J corresponding CVU's, said J CVU's comprise a first input port of a switch from an ATM network; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; transferring K portions of the ATM cell from the memory array to corresponding K CDU's, where 1≦J<K and J and K are integers, said K portions of the ATM cell comprising the ATM cell, said K CDU's defining a first output port of the switch; and transmitting the ATM cell from the first output port to the ATM network.
Claim 15
Independent Claim
123 words
A method for switching an ATM cell comprising the steps of: receiving J portions of the ATM cell at J corresponding CVU's, said J CVU's comprise a first input port of a switch from an ATM network; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; transferring K portions of the ATM cell from the memory array to corresponding K CDU's, where 1≦J<K and J and K are integers, said K portions of the ATM cell comprising the ATM cell, said K CDU's defining a first output port of the switch; and transmitting the ATM cell from the first output port to the ATM network.
Claim 16
Dependent Claim
58 words
A method as described in claim 12 wherein the receiving the ATM cell at a first input port includes the steps of receiving P portions of the ATM cell at corresponding P CVU's, where P≧2 and is an integer, said P portions of the ATM cell comprising the ATM cell, said P CVU's defining the first input port.
Claim 17
Dependent Claim
50 words
A method as described in claim 13 wherein the transferring step includes the step of transferring Q portions of the ATM cell to Q CDU's, where 1≦Q<P and Q is an integer, and Q portions of the ATM cell comprising the ATM and Q CDU's comprising the first output port.
Claim 18
Dependent Claim
60 words
A method as described in claim 12 including after the transferring step, there is the step of reading again the ATM cell in the memory array in one clock cycle, transferring the ATM cell from the memory array to the first output port of the switch; and transmitting the ATM cell from the first output port to the ATM network.
Claim 19
Dependent Claim
143 words
A switch for an ATM cell comprising: I input ports which receive ATM cells from an ATM network, where I≧1 and is an integer; a memory array connected to the I input ports for storing an ATM cell received by one of the I input ports in one clock cycle; O output ports connected to the memory array, where O≧1 and is an integer, one of the 0 output ports transmit an ATM cell which is received from the memory array to the ATM network; and a controller connected to the memory array, I input ports and O output ports for controlling the storage of an ATM cell from one of the input ports into the memory array in one clock cycle, said controller causes the ATM cell to be copied at least two times and transmitted to one of the output ports.
Claim 20
Dependent Claim
143 words
A switch for an ATM cell comprising: I input ports which receive ATM cells from an ATM network, where I≧1 and is an integer; a memory array connected to the I input ports for storing an ATM cell received by one of the I input ports in one clock cycle; O output ports connected to the memory array, where O≧1 and is an integer, one of the 0 output ports transmit an ATM cell which is received from the memory array to the ATM network; and a controller connected to the memory array, I input ports and O output ports for controlling the storage of an ATM cell from one of the input ports into the memory array in one clock cycle, said controller causes the ATM cell to be copied at least two times and transmitted to one of the output ports.
Claim 21
Dependent Claim
24 words
A switch as described in claim 16 wherein one of the output ports is comprised of Q CDU's where Q≧1 and is an integer.
Claim 22
Dependent Claim
105 words
A switch as described in claim 16 wherein one of the input ports is comprised of P CVU's which receive P corresponding portions of the ATM cell, where P≧2 and is an integer, and the P portions comprise the ATM cell; and wherein one of the 0 output ports is comprised of Q CDU's, where 1≦Q<P; and wherein the controller causes the P portions of the ATM cell to be stored in one clock cycle in the memory array, then read in one clock cycle from the memory array into Q portions and transfer the Q portions of the ATM cell to Q corresponding CDU's.
Claim 23
Dependent Claim
105 words
A switch as described in claim 16 wherein one of the input ports is comprised of J CVU's which receive J corresponding portions of the ATM cell, where J≧1 and is an integer, and the J portions comprise the ATM cell; and wherein one of the 0 output ports is comprised of K CDU's, where 1≦J<K; and wherein the controller causes the P portions of the ATM cell to be stored in one clock cycle in the memory array, then read in one clock cycle from the memory array into K portions and transfer the K portions of the ATM cell to K corresponding CDU's.
Claim 24
Independent Claim
98 words
A method of demultiplexing an ATM cell comprising the steps of: receiving P portions of the ATM cell at P corresponding CVU's which serve the ATM cell from an ATM network, said ATM comprised of the P portions, where P≧2 and is an integer; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; and transferring Q portions of the ATM cell from the memory array to Q corresponding CDU's which transmit the ATM cell to an ATM network, where 1≦Q<P.
Claim 25
Independent Claim
98 words
A method of demultiplexing an ATM cell comprising the steps of: receiving P portions of the ATM cell at P corresponding CVU's which serve the ATM cell from an ATM network, said ATM comprised of the P portions, where P≧2 and is an integer; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; and transferring Q portions of the ATM cell from the memory array to Q corresponding CDU's which transmit the ATM cell to an ATM network, where 1≦Q<P.
Claim 26
Independent Claim
97 words
A method of multiplexing an ATM cell comprising the steps of: receiving J portions of the ATM cell at J corresponding CVU's which serve the ATM cell from an ATM network, said ATM comprised of the J portions, where J≧1 and is an integer; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; transferring K portions of the ATM cell from the memory array to K corresponding CDU's which transmit the ATM cell to an ATM network, where 1≦J<K.
Claim 27
Independent Claim
97 words
A method of multiplexing an ATM cell comprising the steps of: receiving J portions of the ATM cell at J corresponding CVU's which serve the ATM cell from an ATM network, said ATM comprised of the J portions, where J≧1 and is an integer; storing the ATM cell in one clock cycle in a memory array of the switch; reading the ATM cell in the memory array in one clock cycle; transferring K portions of the ATM cell from the memory array to K corresponding CDU's which transmit the ATM cell to an ATM network, where 1≦J<K.
References Cited (Backward Citations)
US5241536A
Cited
US5309395A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-08-20 | 2000-02-19 | 2000-08-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-08-20 | 2004-02-19 | 2004-08-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-08-20 | 2008-02-19 | 2008-08-20 | $7700.00 | Window Closed / Lapsed |