US5548286A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analogue and digital convertors using pulse edge modulators with non-linearity error correction
Assignee: Cirrus Logic Inc
•
Filing: 1992-02-21
•
Granted: 1996-08-20
•
Expires: 2012-02-21
Abstract
Abstract PCT No. PCT/GB92/00312 Sec. 371 Date Aug. 25, 1993 Sec. 102(e) Date Aug. 25, 1993 PCT Filed Feb. 21, 1992 PCT Pub. No. WO92/15153 PCT Pub. Date Sep. 3, 1992A signal convertor comprising a pulse modulator, and a modifier for modifying the signal input thereto in dependence upon the error in previous values of the output thereof, to reduce the effects of said error within a desired signal band.
Inventors
- 👤 Peter G. Craven
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:22
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/82; H03M1/10; H03M1/1009; H03M1/1033; H03M1/1038; H03M1/12; H03M1/20; H03M1/208; H03M3/00; H03M3/30; H03M3/50; H03M3/502; H03M3/506; H03M1/50; H03M1/504; H03M1/822
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
49 words
A signal convertor comprising: a pulse edge modulator having an input and providing an output, and means, responsive to any error in previous values of said modulator output, for modifying said input to said pulse edge modulator thereby reducing effects of said any error within a desired signal band.
Claim 2
Dependent Claim
49 words
A signal convertor comprising: a pulse edge modulator having an input and providing an output, and means, responsive to any error in previous values of said modulator output, for modifying said input to said pulse edge modulator thereby reducing effects of said any error within a desired signal band.
Claim 3
Dependent Claim
52 words
A signal converter comprising: a pulse edge modulator controlled by an output of a quantizer, the quantizer having a processed input, said input processed in dependence upon said quantizer output, by a non-linear stage for reducing effects of any non-linearity due to the pulse edge modulator over a predetermined signal frequency band.
Claim 4
Dependent Claim
52 words
A signal converter comprising: a pulse edge modulator controlled by an output of a quantizer, the quantizer having a processed input, said input processed in dependence upon said quantizer output, by a non-linear stage for reducing effects of any non-linearity due to the pulse edge modulator over a predetermined signal frequency band.
Claim 5
Dependent Claim
83 words
A signal converter comprising: a signal input, a quantizer, a feedback network around said quantizer for reducing quantizer noise in a desired frequency band relative to a spectrum of said quantizer which would be exhibited without said feedback network, and a pulse modulator, responsive to an output of said quantizer, for providing output of predetermined amplitude pulses, where times of occurrence of edges of said pulses are controlled, by including means for reducing the noise within said desired band by said pulse modulator.
Claim 6
Dependent Claim
83 words
A signal converter comprising: a signal input, a quantizer, a feedback network around said quantizer for reducing quantizer noise in a desired frequency band relative to a spectrum of said quantizer which would be exhibited without said feedback network, and a pulse modulator, responsive to an output of said quantizer, for providing output of predetermined amplitude pulses, where times of occurrence of edges of said pulses are controlled, by including means for reducing the noise within said desired band by said pulse modulator.
Claim 7
Dependent Claim
32 words
A signal convertor including: a pulse edge modulator, and digital memory means for storing data related to distortion present in an output of said modulator in response to varying input signal levels.
Claim 8
Dependent Claim
32 words
A signal convertor including: a pulse edge modulator, and digital memory means for storing data related to distortion present in an output of said modulator in response to varying input signal levels.
Claim 9
Dependent Claim
26 words
A convertor according to claim 4 comprising a digital to analogue converter, wherein said memory means is provided in a feedback path of said signal converter.
Claim 10
Dependent Claim
16 words
A convertor according to claim 4, further comprising memory means in a forward signal path thereof.
Claim 11
Dependent Claim
34 words
A convertor according to claim 6 in which the forward signal path is tapped to provide a plurality of differentially delayed signals, to which the memory means in the forward path is jointly responsive.
Claim 12
Dependent Claim
37 words
A convertor according to claim 6 comprising an analogue to digital convertor having a digital output path, wherein said pulse modulator is included in a feedback path, and said digital memory is in the digital output path.
Claim 13
Dependent Claim
16 words
A convertor according to claim 4, in which said memory means comprises a read-only memory device.
Claim 14
Dependent Claim
12 words
A convertor according to claim 4, in which said memory is reconditionable.
Claim 15
Dependent Claim
13 words
A convertor according to claim 10 further comprising means for deriving said data.
Claim 16
Dependent Claim
47 words
A convertor according to claim 11 in which said deriving means comprises means for supplying a predetermined input to said modulator, means for measuring a corresponding output at a point in a signal path subsequent to said modulator, and means for deriving said data from said output.
Claim 17
Dependent Claim
94 words
A signal converter which includes: a pulse modulator producing pulses having edges, temporal positions of said edges are controlled in dependence upon a value of a digital input to the converter, look-up table means storing a plurality of correction values, said look-up table being addressed in dependence upon a digital input, and means for differentially delaying one of said digital input and an output of said look-up table means, said look-up table means output combined with each digital input to reduce any error generated by the pulse modulator in response to said digital input.
Claim 18
Dependent Claim
94 words
A signal converter which includes: a pulse modulator producing pulses having edges, temporal positions of said edges are controlled in dependence upon a value of a digital input to the converter, look-up table means storing a plurality of correction values, said look-up table being addressed in dependence upon a digital input, and means for differentially delaying one of said digital input and an output of said look-up table means, said look-up table means output combined with each digital input to reduce any error generated by the pulse modulator in response to said digital input.
Claim 19
Dependent Claim
95 words
A signal converter which includes: a pulse modulator producing pulses having edges, temporal positions of said edges are controlled in dependence upon a value of a digital input to the converter, look-up table means storing a plurality of correction values, said look-up table being addressed in dependence upon a digital input, and means for differentially delaying one of said digital input and an output of said look-up table means, said look-up table means output is connected to said pulse modulator to reduce any error generated by the pulse modulator in response to said digital input.
Claim 20
Dependent Claim
95 words
A signal converter which includes: a pulse modulator producing pulses having edges, temporal positions of said edges are controlled in dependence upon a value of a digital input to the converter, look-up table means storing a plurality of correction values, said look-up table being addressed in dependence upon a digital input, and means for differentially delaying one of said digital input and an output of said look-up table means, said look-up table means output is connected to said pulse modulator to reduce any error generated by the pulse modulator in response to said digital input.
References Cited (Backward Citations)
GB1444216A
Cited
GB2076240A
Cited
GB2077539A
Cited
GB2144299A
Cited
GB2171569A
Cited
GB2171568A
Cited
GB2176070A
Cited
EP0335988A1
Cited
US4947171A
Cited
JPH01284123A
Cited
US5339054A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-08-20 | 2000-02-19 | 2000-08-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-08-20 | 2004-02-19 | 2004-08-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-08-20 | 2008-02-19 | 2008-08-20 | $7700.00 | Window Closed / Lapsed |