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US5546135A Expired / Lapsed US ⏱️ 0.0 years remaining

Contour restoration apparatus

Assignee: Panasonic Holdings Corp
•
Filing: 1993-02-25
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Granted: 1996-08-13
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Expires: 2013-02-25
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Abstract

Abstract A contour restoration circuit comprises an input terminal, a plural of delay circuits connected to the input terminal in series, a maximum value detection circuit, a minimum value detection circuit, a mean value calculating the mean value from the maximum and minimum values, a subtractor for subtracting the mean value from the input video signal, a gain controller for the subtracted signal, an adder for adding the gain controlled signal to the input video signal and an output terminal.

Inventors

  • 👤 Takuji Okamoto
  • 👤 Masanori Hamada
  • 👤 Kenta Sokawa
  • 👤 Kazuya Uyeda
  • 👤 Hideaki Yamauchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 21:48
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N5/142; G; G06; G06T; G06T5/00; G06T5/73; G06T2207/00; G06T2207/20; G06T2207/20172; G06T2207/20192

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 293 words
A contour restoration apparatus comprising: an input terminal for video signals; a plurality of delay circuits connected in series to said input terminal, each of said plurality of delay circuits having a predetermined delay time for a signal input thereto; a maximum value detection circuit for detecting a maximum value among an input video signal and output signals of said plurality of delay circuits; a minimum value detection circuit for detecting a minimum value among signals same as those input to said maximum value detection circuit; a mean value circuit for calculating a mean value of output signals of said maximum and minimum value detection circuits; a subtraction means for subtracting said mean value from a delayed signal output from one of said plurality of delay circuits, wherein said delayed signal has a delay time of one-half of a delay time obtained by a total of said plurality of said delay circuits; a gain controller for amplifying the output of said subtraction means with a predetermined gain; an adder for adding the output of said gain controller and said delayed signal input to said subtraction means; a non-linear processing circuit to which the output of said adder and the maximum and minimum values output by said maximum and minimum detection circuits are input, said non-linear processing circuit outputting the maximum value if the output signal of said adder is larger than the maximum value, outputting the minimum value if the output signal of said adder is smaller than the minimum value, and outputting the output signal of said adder if the output signal of said adder is between the maximum value and the minimum value; and an output terminal for outputting the output of said non-linear processing circuit as a contour restored signal.
Claim 2
Dependent Claim 293 words
A contour restoration apparatus comprising: an input terminal for video signals; a plurality of delay circuits connected in series to said input terminal, each of said plurality of delay circuits having a predetermined delay time for a signal input thereto; a maximum value detection circuit for detecting a maximum value among an input video signal and output signals of said plurality of delay circuits; a minimum value detection circuit for detecting a minimum value among signals same as those input to said maximum value detection circuit; a mean value circuit for calculating a mean value of output signals of said maximum and minimum value detection circuits; a subtraction means for subtracting said mean value from a delayed signal output from one of said plurality of delay circuits, wherein said delayed signal has a delay time of one-half of a delay time obtained by a total of said plurality of said delay circuits; a gain controller for amplifying the output of said subtraction means with a predetermined gain; an adder for adding the output of said gain controller and said delayed signal input to said subtraction means; a non-linear processing circuit to which the output of said adder and the maximum and minimum values output by said maximum and minimum detection circuits are input, said non-linear processing circuit outputting the maximum value if the output signal of said adder is larger than the maximum value, outputting the minimum value if the output signal of said adder is smaller than the minimum value, and outputting the output signal of said adder if the output signal of said adder is between the maximum value and the minimum value; and an output terminal for outputting the output of said non-linear processing circuit as a contour restored signal.

References Cited (Backward Citations)

GB2124844A Cited
GB2181320A Cited
JPS6314577A Cited
US4823194A Cited
US4853783A Cited
US4918528A Cited
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JPH03241976A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-08-13 2000-02-12 2000-08-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-08-13 2004-02-12 2004-08-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-08-13 2008-02-12 2008-08-13 $7700.00 Window Closed / Lapsed

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