US5543731A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dynamic and preset static multiplexer in front of latch circuit for use in static circuits
Assignee: International Business Machines Corp
•
Filing: 1995-03-31
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Granted: 1996-08-06
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Expires: 2015-03-31
Abstract
Abstract A latch circuit. The circuit includes a static digital logic circuit, comprising a multiplexer having a plurality of static input data lines and one or more select lines for selecting data from one of the input lines as multiplexer output data; latching means for latching output data from the multiplexer; wherein the multiplexer is not a static circuit.
Inventors
- 👤 Leon J. Sigal
- 👤 James D. Warnock
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 08:11
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356104; H03K3/356113; H03K3/356121; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/693; H03K3/356017; H03K3/356026
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
46 words
A static digital logic circuit, comprising: a preset static multiplexer having a plurality of static input data lines and one or more select lines for selecting data from one of the input lines as multiplexer output data; latching means for latching output data from the multiplexer.
Claim 2
Dependent Claim
46 words
A static digital logic circuit, comprising: a preset static multiplexer having a plurality of static input data lines and one or more select lines for selecting data from one of the input lines as multiplexer output data; latching means for latching output data from the multiplexer.
Claim 3
Dependent Claim
46 words
The circuit of claim 1, wherein the multiplexer comprises a gate, the gate receiving as input the data input data lines and the select lines, and having means responsive to the select inputs for selecting one of the data lines for storing data in the latch.
Claim 4
Dependent Claim
28 words
The circuit of claim 2 further comprising a clock coupled to the gate and the latching means, the clock having means for actuating the gate and latching means.
Claim 5
Dependent Claim
46 words
A circuit, comprising: a preset static multiplexer having a plurality of static input data lines and one or more select lines for selecting data from one of the input lines as multiplexer output data; and a latch circuit coupled to receive output data from the multiplexer.
Claim 6
Dependent Claim
46 words
A circuit, comprising: a preset static multiplexer having a plurality of static input data lines and one or more select lines for selecting data from one of the input lines as multiplexer output data; and a latch circuit coupled to receive output data from the multiplexer.
Claim 7
Dependent Claim
27 words
A circuit, comprising: a preset static multiplexer having a plurality of input lines, a select line and an output line; a latch coupled to the output line.
Claim 8
Dependent Claim
27 words
A circuit, comprising: a preset static multiplexer having a plurality of input lines, a select line and an output line; a latch coupled to the output line.
References Cited (Backward Citations)
US4709173A
Cited
US4692634A
Cited
US4963770A
Cited
US4868413A
Cited
US5396127A
Cited
US5357153A
Cited
US5311080A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-08-06 | 2000-02-05 | 2000-08-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-08-06 | 2004-02-05 | 2004-08-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-08-06 | 2008-02-05 | 2008-08-06 | $7700.00 | Window Closed / Lapsed |