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US5539227A Expired / Lapsed US ⏱️ 0.0 years remaining

Multi-layer wiring

Assignee: Mitsubishi Electric Corp
•
Filing: 1995-08-02
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Granted: 1996-07-23
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Expires: 2015-08-02
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Abstract

Abstract A method of producing a multi-layer wiring, first kind layer wirings formed on a semiconductor substrate are covered by an insulating film, a part of a second kind layer wiring is formed at a prescribed region of the surface of the insulating film, and, thereafter, the remaining part of the second kind layer wiring and the third kind layer wiring are formed in the same process so that the remaining part of the second kind layer wiring and the first kind layer wiring cross each other in an airbridge structure and the third kind layer wiring and a part of the second kind layer wiring also cross each other in an airbridge structure. The portion of the second kind layer wiring other than the portion that crosses with the third kind layer wiring in an airbridge structure, is produced with the first kind layer wiring in an airbridge structure in the process of producing the third kind layer wiring. Therefore, at least one of the crossing parts between the first kind layer wiring and the second kind layer wiring can be formed in an airbridge structure, and as a result, a multi-layer wiring that has reduced inter-layer capacitance over all of the multi-layer wiring structure is obtained by the number of process steps as in the prior art.

Inventors

  • 👤 Hirofumi Nakano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 00:03
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/482; H10W20/483; H10W20/41; H10W20/44; H10W20/4403; H10W20/4432; H10W20/495

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 251 words
A semiconductor device wiring structure including: a semiconductor substrate having a surface; a first wiring layer disposed on and contacting part of the surface; a first electrically insulating film disposed on and contacting the surface and the first wiring layer, covering the first wiring layer; a second wiring layer disposed on and contacting the first electrically insulating film, part of the second wiring layer being disposed directly opposite and crossing the first wiring layer, the first wiring layer being electrically insulated from the second wiring layer by the first electrically insulating film; and a third wiring layer having generally coplanar first, second, and third parts, the first part and the second part being spaced apart from each other, having respective ends transverse to the surface, extending in opposite directions from the respective ends, and spaced from the first electrically insulating film by respective air gaps, each of the first part and the second part including a respective leg extending from proximate the respective ends, transverse to the surface, to and contacting respective parts of the second wiring layer, thereby electrically connecting the first and second parts together through the legs and the second wiring layer, the third part being disposed between the first and second parts, opposite the respective ends of the first and second parts, spaced and electrically insulated from the first and second parts and from the second wiring layer by respective air gaps and extending in a direction transverse to the directions of the first and second parts.
Claim 2
Dependent Claim 251 words
A semiconductor device wiring structure including: a semiconductor substrate having a surface; a first wiring layer disposed on and contacting part of the surface; a first electrically insulating film disposed on and contacting the surface and the first wiring layer, covering the first wiring layer; a second wiring layer disposed on and contacting the first electrically insulating film, part of the second wiring layer being disposed directly opposite and crossing the first wiring layer, the first wiring layer being electrically insulated from the second wiring layer by the first electrically insulating film; and a third wiring layer having generally coplanar first, second, and third parts, the first part and the second part being spaced apart from each other, having respective ends transverse to the surface, extending in opposite directions from the respective ends, and spaced from the first electrically insulating film by respective air gaps, each of the first part and the second part including a respective leg extending from proximate the respective ends, transverse to the surface, to and contacting respective parts of the second wiring layer, thereby electrically connecting the first and second parts together through the legs and the second wiring layer, the third part being disposed between the first and second parts, opposite the respective ends of the first and second parts, spaced and electrically insulated from the first and second parts and from the second wiring layer by respective air gaps and extending in a direction transverse to the directions of the first and second parts.
Claim 3
Dependent Claim 24 words
The wiring structure of claim 1 wherein the first and second parts of the third wiring layer comprise laminated films of titanium and gold.
Claim 4
Dependent Claim 26 words
The semiconductor wiring device of claim 1 wherein the first, second, and third parts of the third wiring layer are simultaneously formed in the same process.
Claim 5
Dependent Claim 50 words
The semiconductor wiring device of claim 1 wherein the first and second parts of the third wiring layer carry one of a power supply current and an electrical signal and the third part of the third wiring layer carries the other of the power supply current and the electrical signal.
Claim 6
Dependent Claim 41 words
The semiconductor wiring device of claim 1 wherein the third part of the third wiring layer is disposed opposite a part of the second wiring layer electrically connecting the legs of the first and second parts of the third wiring layer.

References Cited (Backward Citations)

US3890636A Cited
US5095352A Cited
US4933743A Cited
US5171713A Cited
JPH04171845A Cited
JPH04346460A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-07-23 2000-01-22 2000-07-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-07-23 2004-01-22 2004-07-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-07-23 2008-01-22 2008-07-23 $7700.00 Window Closed / Lapsed

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