Patent US2604462A successfully refreshed from Google Patents.
US5534828A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digitized quadrature modulator
Assignee: NTT Inc
•
Filing: 1995-07-18
•
Granted: 1996-07-09
•
Expires: 2015-07-18
Abstract
Abstract A digitized quadrature modulator receives an I-channel input digital signal and Q-channel input digital signal, and quadrature modulater the I-channel and Q-channel input digital signals by digital signal processing. The modulator has a digital filter (504) for shaping the spectrum of the I-channel and Q-channel input digital signals to provide I-channel and Q-channel output signals. The output signals have a predetermined phase shift between the I-channel and the Q-channel so as to compensate a phase difference based upon the quadrature modulation by the digital signal processing. Complementers (505a, 505b) for taking the complement of the I-channel and Q-channel output signals to provide I-channel and Q-channel complement signals. A multiplexer (505c) multiplexer the I-channel and Q-channel output signals from the digital filter and the I-channel and Q-channel complement signals from the complementers to provide a quadrature modulated output signal.
Inventors
- 👤 Takashi Okada
- 👤 Tadashi Shirato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:47
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/32; H04L27/34; H04L27/36; H04L27/365; H04L1/00; H04L1/0001; H04L1/0002; H04L1/0003
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
152 words
A digitized quadrature modulator for receiving n-sequence(s) (n is an integer equal to or greater than one) of I-channel input digital signal and n-sequence(s) of Q-channel input digital signal, and for quadrature modulating the I-channel and Q-channel input digital signals by a digital signal processing, comprising: a digital filter for shaping a spectrum of the I-channel and Q-channel input digital signals to provide I-channel and Q-channel output signals, said output signals having a predetermined phase shift between the I-channel and the Q-channel so as to compensate a phase difference based upon the quadrature modulation by the digital signal processing; complementary circuits for taking complement of the I-channel and Q-channel output signals to provide I-channel and Q-channel complement signals; and a multiplexer circuit for multiplexing the I-channel and Q-channel output signals from the digital filter and the I-channel and Q-channel complement signals from the complementary circuits to provide a quadrature modulated output signal.
Claim 2
Dependent Claim
152 words
A digitized quadrature modulator for receiving n-sequence(s) (n is an integer equal to or greater than one) of I-channel input digital signal and n-sequence(s) of Q-channel input digital signal, and for quadrature modulating the I-channel and Q-channel input digital signals by a digital signal processing, comprising: a digital filter for shaping a spectrum of the I-channel and Q-channel input digital signals to provide I-channel and Q-channel output signals, said output signals having a predetermined phase shift between the I-channel and the Q-channel so as to compensate a phase difference based upon the quadrature modulation by the digital signal processing; complementary circuits for taking complement of the I-channel and Q-channel output signals to provide I-channel and Q-channel complement signals; and a multiplexer circuit for multiplexing the I-channel and Q-channel output signals from the digital filter and the I-channel and Q-channel complement signals from the complementary circuits to provide a quadrature modulated output signal.
Claim 3
Dependent Claim
89 words
A modulator as claimed in claim 1, wherein said complementary circuits consist of a first complementer for taking the complement of the I-channel output signal to provide an I-channel complement signal and a second complementer for taking the complement of the Q-channel output signal to provide a Q-channel complement signal, and wherein said multiplexer circuit consists of a selector for sequentially multiplexing the I-channel output signal, the Q-channel output signal, the I-channel complement signal, and the Q-channel complement signal in this order to provide a quadrature modulated output signal.
Claim 4
Dependent Claim
44 words
A modulator as claimed in claim 1, wherein said digital filter is constituted so that a phase of only the I-channel input digital signal or the Q-channel input digital signal is shifted by an amount of the phase difference based upon the quadrature modulation.
Claim 5
Dependent Claim
47 words
A modulator as claimed in claim 1, wherein said digital filter is constituted so that phases of the I-channel and Q-channel input digital signals are equally shifted in an opposite direction to each other by a half amount of the phase difference based upon the quadrature modulation.
Claim 6
Dependent Claim
68 words
A modulator as claimed in claim 1, wherein said digital filter is constituted so that phases of the I-channel and Q-channel input digital signals are equally shifted in an opposite direction to each other by a half amount of the phase difference based upon the quadrature modulation, and that the same filtering circuit is utilized from both directions by inverting a time base of the input digital signals.
Claim 7
Dependent Claim
42 words
A modulator as claimed in claim 1, wherein said digital filter includes a waveform memory for storing amplitude information having a predetermined phase shift between the I-channel and the Q-channel so as to compensate the phase difference based upon the quadrature modulation.
Claim 8
Dependent Claim
38 words
A modulator as claimed in claim 1, wherein said digital filter is constituted so that a number of samples per symbol M S in the digital filter is varied depending upon a baud rate control signal applied thereto.
Claim 9
Dependent Claim
57 words
A modulator as claimed in claim 7, wherein the I-channel and Q-channel input digital signals have a plurality of baud rates, and wherein said modulator is constituted so that the number of samples per symbol M S is varied depending upon the baud rates to provide modulated output signals having a same center frequency with each other.
Claim 10
Dependent Claim
53 words
A modulator as claimed in claim 7, wherein said digital filter includes a waveform memory having a plurality of ROMs for storing respective waveform data corresponding to a plurality of phases and wherein said ROMs of a number which corresponds to the number of samples per symbol M S are enabled to operate.
Claim 11
Dependent Claim
59 words
A modulator as claimed in claim 9, wherein said digital filter includes a plurality of weighting accumulators for weighting the respective waveform data from said ROMs to provide weighted data, and an adder for selecting the weighted data of a number which corresponds to the number of samples per symbol M S and for shift-adding the selected weighted data.
Claim 12
Dependent Claim
33 words
A modulator as claimed in claim 9, wherein said digital filter includes a circuit for selectively clearing the waveform data from the ROMs in response to a modulation scheme control signal applied thereto.
Claim 13
Dependent Claim
53 words
A modulator as claimed in claim 1, wherein said digital filter includes a waveform memory having a plurality of ROMs for storing respective waveform data corresponding to a plurality of phases and a circuit for selectively clearing the waveform data from the ROMs in response to the modulation scheme control signal applied thereto.
Claim 14
Dependent Claim
98 words
A modulator as claimed in claim 1, wherein said digital filter includes means for multiplexing the input digital signals to generate an address signal, a waveform memory for storing waveform data having a predetermined phase shift between the 1-channel and the Q-channel so as to compensate the phase difference caused by the quadrature modulation, and for outputting respective waveform data corresponding to a plurality of phases in response to the address signal, a plurality of weighting accumulators for weighting the respective waveform data from said memory to provide weighted data, and an adder for adding the weighted data.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-07-09 | 2000-01-08 | 2000-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-07-09 | 2004-01-08 | 2004-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-07-09 | 2008-01-08 | 2008-07-09 | $7700.00 | Window Closed / Lapsed |