US5523615A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Porous dielectric material with improved pore surface properties for electronics applications
Assignee: Texas Instruments Inc
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Filing: 1995-06-07
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Granted: 1996-06-04
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Expires: 2015-06-07
Abstract
Abstract This invention provides an improved porous structure for semiconductor devices and a process for making the same. This process may be applied to an existing porous structure 28, which may be deposited, for sample, between patterned conductors 24. The process may include baking the structure in a reducing atmosphere, preferably a forming gas, to dehydroxylate the pore surfaces. The process may include baking the structure in a halogen-containing atmosphere to bond halogens to the pore surfaces. It has been found that a porous structure treated in such a manner generally exhibits improved dielectric properties relative to an untreated sample.
Inventors
- 👤 Chi-Chen Cho
- 👤 Bruce E. Gnade
- 👤 Douglas M. Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 20:45
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W20/01; H10W20/071; H10W20/072; H10W20/46; H10W20/495
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
70 words
A semiconductor device which comprises: (a) a layer of patterned conductors formed on a substrate; (b) a porous dielectric layer disposed at least partially between at least one pair of said patterned conductors, said porous dielectric layer having a porosity of at least 20%, an average pore diameter of between 2 nm and 80 nm, and an OH concentration of less than 1.5 OH groups/nm 2 of pore surface area.
Claim 2
Dependent Claim
70 words
A semiconductor device which comprises: (a) a layer of patterned conductors formed on a substrate; (b) a porous dielectric layer disposed at least partially between at least one pair of said patterned conductors, said porous dielectric layer having a porosity of at least 20%, an average pore diameter of between 2 nm and 80 nm, and an OH concentration of less than 1.5 OH groups/nm 2 of pore surface area.
Claim 3
Dependent Claim
23 words
The semiconductor device of claim 1, wherein said OH concentration of said porous dielectric layer is less than 0.5 OH groups/nm 2 .
Claim 4
Dependent Claim
16 words
The semiconductor device of claim 1, wherein said porous dielectric is comprised substantially of silicon dioxide.
Claim 5
Dependent Claim
34 words
The semiconductor device of claim 1, wherein halogen-containing groups are bonded to the pore surfaces of said porous dielectric, wherein said halogen-containing groups exist in a concentration of greater than 0.8 groups/nm 2 .
Claim 6
Dependent Claim
16 words
The semiconductor device of claim 4, wherein said halogen containing groups are comprised of atomic fluorine.
Claim 7
Dependent Claim
18 words
The semiconductor device of claim 1, further comprising a substantially solid cap layer deposited over said porous dielectric.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-06-04 | 1999-12-04 | 2000-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-06-04 | 2003-12-04 | 2004-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-06-04 | 2007-12-04 | 2008-06-04 | $7700.00 | Window Closed / Lapsed |