Method and apparatus for scheduling the dispatch of instructions from a reservation station

Claim 3

The apparatus of claim 1 further comprising means for tracking the age of an instruction in said reservation station.

Claim 4

The apparatus of claim 2 wherein said age tracking means comprises an age field associated and stored with each entry in said reservation station memory array, said age field being incremented upon a predetermined condition.

Claim 5

The apparatus of claim 3 wherein said scheduling logic comprises means for determining which group of N entries in the reservation station memory array contains the entry with the age field having the highest value, said reservation station scheduling logic beginning said sequential scan at the boundary of the group of N entries having the oldest entry.

Claim 6

The apparatus of claim 4 wherein said scheduling logic comprises a plurality of schedulers each, respectively, for scheduling data-ready instruction dispatch through one of said plurality of dispatch ports.

Claim 7

The apparatus of claim 5 wherein said plurality of schedulers are coupled together to provide for dynamic scheduling of data-ready instructions through multiple dispatch ports.

Claim 8

The apparatus of claim 4 wherein said group of N entries comprises four (4) entries.

Claim 9

The apparatus of claim 3 wherein said predetermined condition is the writing of a new entry into said reservation station memory array.

Claim 10

The apparatus of claim 3 wherein said predetermined condition is the writing of a branch instruction into said reservation station memory array.

Claim 11

The apparatus of claim 2 wherein said age tracking means comprises a plurality of counters, each associated with one entry in said reservation station memory array.

Claim 12

The apparatus of claim 2 wherein said age tracking means comprises a plurality of counters, each associated with a group of entries in said reservation station memory array.

Claim 13

The apparatus of claim 2 wherein said age tracking means is an external counter which writes its count value into said array when an entry is written into said array.

Claim 14

A computer system comprising: an input/output (I/O) means for providing a communications interface; a memory means coupled to said I/O means for storing instructions and computer data; data input means coupled to said I/O means for providing data input and data output to interface with a computer user; and microprocessor means coupled to said I/O means for executing instructions and processing computer data, said microprocessor means further comprising an apparatus for scheduling the dispatch of instructions to a plurality of execution units, said scheduling apparatus comprising: a reservation station memory array for storing data-dependent instructions until the data dependencies are resolved, wherein said data-dependent-instructions are converted to data-ready instructions; a plurality of dispatch ports for coupling said reservation station memory array to each of said plurality of execution units, respectively; reservation station scheduling logic for controlling the dispatch of data-ready instructions from said reservation station memory array to said plurality of execution units; and ready bit logic coupled to said reservation station memory array and to said plurality of execution units for providing ready bit signals to said reservation station scheduling logic indicating when stored instructions are data-ready and identifying execution unit availability, wherein said reservation station scheduling logic sequentially scans through said reservation memory array triggering the dispatch of instructions for which said ready bit logic identified as being data-ready and having an available execution unit.

Claim 15

A computer system comprising: an input/output (I/O) means for providing a communications interface; a memory means coupled to said I/O means for storing instructions and computer data; data input means coupled to said I/O means for providing data input and data output to interface with a computer user; and microprocessor means coupled to said I/O means for executing instructions and processing computer data, said microprocessor means further comprising an apparatus for scheduling the dispatch of instructions to a plurality of execution units, said scheduling apparatus comprising: a reservation station memory array for storing data-dependent instructions until the data dependencies are resolved, wherein said data-dependent-instructions are converted to data-ready instructions; a plurality of dispatch ports for coupling said reservation station memory array to each of said plurality of execution units, respectively; reservation station scheduling logic for controlling the dispatch of data-ready instructions from said reservation station memory array to said plurality of execution units; and ready bit logic coupled to said reservation station memory array and to said plurality of execution units for providing ready bit signals to said reservation station scheduling logic indicating when stored instructions are data-ready and identifying execution unit availability, wherein said reservation station scheduling logic sequentially scans through said reservation memory array triggering the dispatch of instructions for which said ready bit logic identified as being data-ready and having an available execution unit.

Claim 16

The apparatus of claim 13 further comprising means for tracking the age of an instruction in said reservation station.

Claim 17

The apparatus of claim 14 wherein said age tracking means comprises an age field associated and stored with each entry in said reservation station memory array, said age field being incremented upon a predetermined condition.

Claim 18

The apparatus of claim 15 wherein said predetermined condition is the writing of a new entry into said reservation station memory array.

Claim 19

The apparatus of claim 15 wherein said predetermined condition is the writing of a branch instruction into said reservation station memory array.

Claim 20

The apparatus of claim 15 wherein said scheduling logic comprises means for determining which group of N entries in the reservation station memory array contains the entry with the age field having the oldest value, said reservation station scheduling logic beginning said sequential scan at the boundary of the group of N entries having the oldest entry.

Claim 21

The apparatus of claim 14 wherein said age tracking means comprises a plurality of counters, each associated with one entry in said reservation station memory array.

Claim 22

The apparatus of claim 14 wherein said age tracking means comprises a plurality of counters, each associated with a group of entries in said reservation station memory array.

Claim 25

The method of claim 21 where in said finding step comprises the steps of: grouping said reservation station entries into N groups of entries; and broadcasting from each of said N groups the age of the oldest entry in the group, said sequential scanning step then beginning at the beginning of group of entries having the oldest entry.

Claim 26

The method of claim 21 further comprising the step of incrementing the age of all previously written entries in the reservation station when a new entry is written to the reservation station memory array.

Claim 27

The method of claim 21 further comprising the step of incrementing the age of all entries in the reservation station when a branch instruction is written into the reservation station memory array.

Claim 28

The method of claim 21 further comprising the step of setting the age field of an entry in said reservation station to a predetermined value to affect the priority of said entry.