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US5519667A Expired / Lapsed US ⏱️ 0.0 years remaining

Random access memory with apparatus for reducing power consumption

Assignee: Analog Devices Inc
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Filing: 1995-06-05
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Granted: 1996-05-21
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Expires: 2015-06-05
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Abstract

Abstract A random access memory (RAM) having an array of memory cells the signal lines to which are activatable by corresponding current sources. The memory is divided into "pages", and control pulses are produced to turn on the current sources involved in activating the signal lines to any page of memory cells being accessed and to turn off the remainder. The control pulses are directed through a pipelined pair of registers, and a look-ahead logic circuit examines the two pipelined control pulses identified as the "present" and "next" pulses. This logic circuitry serves to turn on the current sources for the page of memory to be accessed during the next clock time, and to maintain in an on state the current sources for the page of memory presently being accessed.

Inventors

  • 👤 Stephen W. Harston

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 20:22
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/10; G11C7/1015; G11C7/1039; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/413; G11C11/417; G11C7/1048; H; H03; H03M; H03M1/00; H03M1/002; H03M1/66; H03M1/74; H03M1/742

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 108 words
In a digital device having a plurality of current sources arranged to be turned on selectively to produce an output current; said device further including means to develop control pulses serving to control said current sources and providing successive pipelined registers for pulses identified as the "present" pulse and the "next" pulse; the method of controlling the status of said current sources comprising the steps of: examining the states of said "present" pulse and said "next" pulse; and controlling said current sources to prevent any flow of current when the states of both said examined pulses are such as to establish that the source current be turned off.
Claim 2
Dependent Claim 108 words
In a digital device having a plurality of current sources arranged to be turned on selectively to produce an output current; said device further including means to develop control pulses serving to control said current sources and providing successive pipelined registers for pulses identified as the "present" pulse and the "next" pulse; the method of controlling the status of said current sources comprising the steps of: examining the states of said "present" pulse and said "next" pulse; and controlling said current sources to prevent any flow of current when the states of both said examined pulses are such as to establish that the source current be turned off.
Claim 3
Dependent Claim 35 words
The method of claim 1, including the step of turning on the current sources when either one or the other (or both) of said present and next pulses calls for the sources to be on.
Claim 4
Dependent Claim 19 words
The method of claim 1, wherein said present and next pulses control current sources used to activate memory cells.
Claim 5
Dependent Claim 50 words
The method of claim 3, wherein said memory cells are arranged in groups identified as pages; and directing said control pulses to activate the current sources for selected pages of memory cells while turning off at least a portion of the current sources for the remaining pages of memory cells.

References Cited (Backward Citations)

US3772658A Cited
US5343196A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-05-21 1999-11-20 2000-05-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-05-21 2003-11-20 2004-05-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-05-21 2007-11-20 2008-05-21 $7700.00 Window Closed / Lapsed

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