Data link access unit for T1 spans supporting the extended superframe format (ESF)

Claim 2

A data link access unit for insertion into a T1 span providing communication of frames of digital data between two network elements with at least one of said network elements communicating using extended superframe format (ESF) that provides a data link channel using specified bits in said frames of digital data, said data link access unit comprising: a framer in said T1 span between said network elements for accessing said frames and accumulating performance data for said T1 span; and a processor for accessing said performance data.

Claim 3

The data link access unit of claim 1, wherein only a first one of said network elements communicates using ESF and the second network element communicates using superframe format (SF), and said data link access unit further comprises means for conversion of said frames between SF and ESF in said T1 span between said network elements.

Claim 4

The data link access unit of claim 1, wherein said framer communicates said performance monitoring data over said T1 span in said data link channel bits in said frames with at least one of said network elements.

Claim 5

The data link access unit of claim 1, wherein said processor further comprises a port enabling external access to said performance data.

Claim 6

The data link access unit of claim 1, wherein said processor further comprises a port enabling communication of message data through said processor and said framer over said data link channel in said frames carried by said T1 span.

Claim 7

The data link access unit of claim 1, wherein said network elements comprise channel bank units.

Claim 8

A data link access unit for insertion into a T1 span providing communication of frames of digital data between two channel bank units with at least one of said channel bank units communicating using extended superframe format (ESF) that provides a data link channel using specified bits in said frames of digital data, said data link access unit comprising: a framer in said T1 span between said channel bank units for accessing said frames and for communicating data in said data link channel with at least one of said network elements; and a processor for communicating message data over said T1 span via said framer in said data link bits, said processor having a port for external communication of said message data.

Claim 9

A data link access unit for insertion into a T1 span providing communication of frames of digital data between two channel bank units with at least one of said channel bank units communicating using extended superframe format (ESF) that provides a data link channel using specified bits in said frames of digital data, said data link access unit comprising: a framer in said T1 span between said channel bank units for accessing said frames and for communicating data in said data link channel with at least one of said network elements; and a processor for communicating message data over said T1 span via said framer in said data link bits, said processor having a port for external communication of said message data.

Claim 10

The data link access unit of claim 7, wherein said framer accumulates performance data in regard to said T1 span and said processor accesses said performance data.

Claim 11

The data link access unit of claim 7, wherein said framer accumulates performance data in regard to said T1 span and communicates said performance data over said T1 span in said data link bits.

Claim 12

The data link access unit of claim 7, wherein only a first one of said channel banks communicates using ESF and the second channel bank communicates using superframe format (SF), and said data link access unit further comprises means for conversion of said frames between SF and ESF in said T1 span between said network elements.

Claim 13

A data link access unit for insertion into a T1 span providing communication of frames of digital data between a first channel bank unit communicating using superframe format (SF) and a second channel bank unit communicating using extended superframe format (ESF) that provides a data link channel using specified bits in said frames of digital data, said data link access unit comprising: a framer in said T1 span between said channel bank units for accessing said ESF frames, for accumulating performance data on the portion of said T1 span between said data link access unit and said second channel bank unit, for communicating data in said data link channel bits in said ESF frames, for converting SF frames transmitted by said first channel bank unit into ESF frames for said second channel bank unit and for converting ESF frames transmitted by said second channel bank unit into SF frames for said first channel bank unit; and a processor for accessing said performance monitoring data, and for communicating message data with said second channel bank unit via said framer in said data link channel bits of said ESF frames.

Claim 14

A data link access unit for insertion into a T1 span providing communication of frames of digital data between a first channel bank unit communicating using superframe format (SF) and a second channel bank unit communicating using extended superframe format (ESF) that provides a data link channel using specified bits in said frames of digital data, said data link access unit comprising: a framer in said T1 span between said channel bank units for accessing said ESF frames, for accumulating performance data on the portion of said T1 span between said data link access unit and said second channel bank unit, for communicating data in said data link channel bits in said ESF frames, for converting SF frames transmitted by said first channel bank unit into ESF frames for said second channel bank unit and for converting ESF frames transmitted by said second channel bank unit into SF frames for said first channel bank unit; and a processor for accessing said performance monitoring data, and for communicating message data with said second channel bank unit via said framer in said data link channel bits of said ESF frames.

Claim 15

The data link access unit of claim 11, wherein said processor further comprises a port enabling external access to said performance data.

Claim 16

The data link access unit of claim 11, wherein said processor further comprises a port enabling communication of message data through said processor and said framer over said data link channel bits in said frames carried by said T1 span.