US5508233A
Expired / Lapsed
US
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Global planarization process using patterned oxide
Assignee: Texas Instruments Inc
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Filing: 1994-10-25
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Granted: 1996-04-16
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Expires: 2014-10-25
Abstract
Abstract A method for planarizing the surface of a layer in a semiconductor device includes forming conductor regions 24, 26, and 28 on a layer of the semiconductor device; forming first insulator regions 30, 32, and 34 in gaps between the conductor regions 24, 26, and 28; and forming an insulator layer 40 over the first insulator regions 30, 32, and 34, and over the conductor regions 24, 26, and 28 such that a surface of the insulator layer 40 will be substantially planar.
Inventors
- 👤 Dennis J. Yost
- 👤 Patrick M. Martin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:58
CPC Classifications
H; H10; H10P; H10P95/00; H10P95/06; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/092
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
100 words
A method for planarizing a surface of a layer in a semiconductor device comprising: forming conductor regions on a layer of the semiconductor device; forming a first insulator layer over and between the conductor regions; etching the first insulator layer to form insulator regions between the conductor regions, and forming gaps between the insulator regions and the conductor regions, and leaving portions of the first insulator layer over the conductor regions after etching; and forming a second insulator layer over the insulator regions and over the conductor regions such that a surface of the second insulator layer will be planar.
Claim 2
Independent Claim
100 words
A method for planarizing a surface of a layer in a semiconductor device comprising: forming conductor regions on a layer of the semiconductor device; forming a first insulator layer over and between the conductor regions; etching the first insulator layer to form insulator regions between the conductor regions, and forming gaps between the insulator regions and the conductor regions, and leaving portions of the first insulator layer over the conductor regions after etching; and forming a second insulator layer over the insulator regions and over the conductor regions such that a surface of the second insulator layer will be planar.
Claim 3
Dependent Claim
18 words
The method of claim 1 wherein photoresist is used to pattern the etch of the first insulator layer.
Claim 4
Dependent Claim
12 words
The method of claim 1 wherein the first insulator layer is oxide.
Claim 5
Dependent Claim
11 words
The method of claim 1 wherein the conductor regions are metal.
Claim 6
Dependent Claim
21 words
The method of claim 1 wherein the first insulator layer is between 0 and 2000 angstroms thicker than the conductor regions.
Claim 7
Dependent Claim
23 words
The method of claim 1 wherein the insulator regions are separated from the portions of the first insulator layer over the conductor regions.
Claim 8
Dependent Claim
24 words
The method of claim 6 wherein the insulator regions are separated from the portions of the first insulator layer by one to three microns.
Claim 9
Dependent Claim
12 words
The method of claim 1 wherein the second insulator layer is oxide.
Claim 10
Independent Claim
70 words
A method for planarizing a surface of a layer in a semiconductor device comprising: forming conductor regions on a layer of the semiconductor device; forming first insulator regions between the conductor regions; forming second insulator regions over the conductor regions and separated from the first insulator regions; and forming an insulator layer over the first and second insulator regions such that a surface of the insulator layer will be planar.
Claim 11
Independent Claim
70 words
A method for planarizing a surface of a layer in a semiconductor device comprising: forming conductor regions on a layer of the semiconductor device; forming first insulator regions between the conductor regions; forming second insulator regions over the conductor regions and separated from the first insulator regions; and forming an insulator layer over the first and second insulator regions such that a surface of the insulator layer will be planar.
Claim 12
Dependent Claim
12 words
The method of claim 9 wherein the first insulator regions are oxide.
Claim 13
Dependent Claim
11 words
The method of claim 9 wherein the conductor regions are metal.
Claim 14
Dependent Claim
11 words
The method of claim 9 wherein the insulator layer is oxide.
Claim 15
Dependent Claim
12 words
The method of claim 9 wherein the second insulator regions are oxide.
References Cited (Backward Citations)
US5192715A
Cited
US5296092A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-16 | 1999-10-16 | 2000-04-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-16 | 2003-10-16 | 2004-04-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-16 | 2007-10-16 | 2008-04-16 | $7700.00 | Window Closed / Lapsed |