US5506498A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Probe card system and method
Assignee: Xandex Inc
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Filing: 1995-03-09
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Granted: 1996-04-09
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Expires: 2015-03-09
Abstract
Abstract A semiconductor wafer probe test interface system (2) and method of operating the system. The wafer probe system includes a plurality of cassettes (302) adapted to hold wafer probe test cards (304). The cassettes are loaded into position for testing of semiconductor wafers with a transport assembly system (6). A memory device (316) on the cassette is used to store data regarding usage of the card such as number of wafer touchdowns. A smart controller (220) has the capability to "talk" to the prober and tester.
Inventors
- 👤 James C. Anderson
- 👤 Brian P. Phillips
- 👤 Charles Honek
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 10:21
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2886
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
61 words
An apparatus for testing semiconductor wafers, comprising: a plurality of wafer probe card assemblies, each of said wafer probe card assemblies having a writable memory mounted thereon for storing and updating operational data regarding said wafer probe card assemblies; and loading means for inserting said wafer probe card assemblies into and removing said wafer probe card assemblies from a testing position.
Claim 2
Independent Claim
61 words
An apparatus for testing semiconductor wafers, comprising: a plurality of wafer probe card assemblies, each of said wafer probe card assemblies having a writable memory mounted thereon for storing and updating operational data regarding said wafer probe card assemblies; and loading means for inserting said wafer probe card assemblies into and removing said wafer probe card assemblies from a testing position.
Claim 3
Dependent Claim
27 words
The apparatus of claim 1 wherein said wafer probe card assemblies comprise wafer probe cards, and said memory is mounted on each of said wafer probe cards.
Claim 4
Dependent Claim
19 words
The apparatus of claim 1 wherein said memory is a serial memory device having a single data input/output contact.
Claim 5
Dependent Claim
15 words
The apparatus of claim 1 wherein said operational data comprises a number of probe touchdowns.
Claim 6
Dependent Claim
40 words
The apparatus of claim 1 wherein said operational data comprises Touchdowns, Serial number, Date of last maintenance, Date of manufacture, Failure nature of probes, Location of failed probes, Operators' I.D., Scheduled maintenance date, Scheduled maintenance touchdowns, and Previous radial orientation.
Claim 7
Dependent Claim
18 words
The apparatus of claim 1 further comprising a wafer prober adapted to hold said wafer probe card assemblies.
Claim 8
Dependent Claim
26 words
The apparatus of claim 6 further comprising a detector for determining when one of said wafer probe card assemblies is fully inserted into said wafer prober.
Claim 9
Dependent Claim
21 words
The apparatus of claim 1 further comprising a memory data transfer means for both writing to and reading from said memory.
Claim 10
Dependent Claim
47 words
The apparatus of claim 1 further comprising a display and memory data transfer means, the apparatus adapted to read said memory with said memory data transfer means, and show a number of touchdowns on said display when said wafer probe card assemblies are loaded into the apparatus.
Claim 11
Dependent Claim
24 words
The apparatus of claim 9 wherein the apparatus is adapted to show maintenance history information regarding said wafer probe card assemblies on said display.
Claim 12
Dependent Claim
18 words
The apparatus of claim 1 wherein said memory is adapted to interface with a standard RS-232 data bus.
Claim 13
Dependent Claim
50 words
The apparatus of claim 1 wherein said loading means is capable of loading a selected one of said wafer probe card assemblies into the testing position, said selected one of said wafer probe card assemblies being selected based on input from a user interface regarding a wafer to be tested.
Claim 14
Independent Claim
184 words
An apparatus for testing semiconductor wafers, comprising: a plurality of wafer probe card assemblies, each of said wafer probe card assemblies having a plurality of probes for establishing contact with and transmitting signals to the wafers, and each of said wafer probe card assemblies having a writable memory mounted thereon for storing and updating operational data regarding said wafer probe card assemblies; a wafer prober adapted to hold said wafer probe card assemblies; loading means for inserting said wafer probe card assemblies into and removing said wafer probe card assemblies from said wafer prober; a detector for determining when one of said wafer probe card assemblies is fully inserted into said wafer prober; memory data transfer means for both writing to and reading from said memory; and a display, the apparatus being adapted to read said memory with said memory data transfer means, and show a number of touchdowns on said display when said wafer probe card assemblies are loaded into said wafer prober, and wherein the apparatus is adapted to show maintenance history information regarding said wafer probe card assemblies on said display.
Claim 15
Independent Claim
184 words
An apparatus for testing semiconductor wafers, comprising: a plurality of wafer probe card assemblies, each of said wafer probe card assemblies having a plurality of probes for establishing contact with and transmitting signals to the wafers, and each of said wafer probe card assemblies having a writable memory mounted thereon for storing and updating operational data regarding said wafer probe card assemblies; a wafer prober adapted to hold said wafer probe card assemblies; loading means for inserting said wafer probe card assemblies into and removing said wafer probe card assemblies from said wafer prober; a detector for determining when one of said wafer probe card assemblies is fully inserted into said wafer prober; memory data transfer means for both writing to and reading from said memory; and a display, the apparatus being adapted to read said memory with said memory data transfer means, and show a number of touchdowns on said display when said wafer probe card assemblies are loaded into said wafer prober, and wherein the apparatus is adapted to show maintenance history information regarding said wafer probe card assemblies on said display.
Claim 16
Dependent Claim
27 words
The apparatus of claim 13 wherein said wafer probe card assemblies comprise wafer probe cards, and said memory is mounted on each of said wafer probe cards.
Claim 17
Dependent Claim
19 words
The apparatus of claim 13 wherein said memory is a serial memory device having a single data input/output contact.
Claim 18
Independent Claim
51 words
An apparatus for testing semiconductor wafers, comprising: a wafer probe card assembly having a plurality of probes for establishing contact with and transmitting signals to the semiconductor wafers; a writable semiconductor memory mounted on said wafer probe card assembly for storing and updating operational data regarding said wafer probe card assembly.
Claim 19
Independent Claim
51 words
An apparatus for testing semiconductor wafers, comprising: a wafer probe card assembly having a plurality of probes for establishing contact with and transmitting signals to the semiconductor wafers; a writable semiconductor memory mounted on said wafer probe card assembly for storing and updating operational data regarding said wafer probe card assembly.
Claim 20
Dependent Claim
23 words
The apparatus of claim 16 wherein said semiconductor memory comprises a single data input/output terminal, said semiconductor memory adapted to transmit data serially.
Claim 21
Independent Claim
67 words
A method for testing semiconductor wafers comprising the steps of: loading a wafer probe card and a writable memory into a wafer testing apparatus using a loading means, said memory for storing and updating operational data regarding said wafer probe card; reading and writing said operational data regarding said wafer probe card from and to said memory; and testing a semiconductor wafer with said wafer testing apparatus.
Claim 22
Independent Claim
67 words
A method for testing semiconductor wafers comprising the steps of: loading a wafer probe card and a writable memory into a wafer testing apparatus using a loading means, said memory for storing and updating operational data regarding said wafer probe card; reading and writing said operational data regarding said wafer probe card from and to said memory; and testing a semiconductor wafer with said wafer testing apparatus.
Claim 23
Dependent Claim
27 words
The method of claim 18 wherein the step of reading said operational data comprises reading a serial bit stream from said memory through a serial data port.
Claim 24
Independent Claim
92 words
A method for testing semiconductor wafers comprising the steps of: entering data into a user interface regarding a wafer to be tested; selecting a wafer probe card in response to said data; loading said wafer probe card and a writable memory into a wafer testing apparatus using a loading means, said memory for storing and updating operational data regarding said wafer probe card; reading said operational data regarding said wafer probe card from said memory; displaying said operational data on a display; and testing a semiconductor wafer with said wafer testing apparatus.
Claim 25
Independent Claim
92 words
A method for testing semiconductor wafers comprising the steps of: entering data into a user interface regarding a wafer to be tested; selecting a wafer probe card in response to said data; loading said wafer probe card and a writable memory into a wafer testing apparatus using a loading means, said memory for storing and updating operational data regarding said wafer probe card; reading said operational data regarding said wafer probe card from said memory; displaying said operational data on a display; and testing a semiconductor wafer with said wafer testing apparatus.
Claim 26
Dependent Claim
27 words
The method of claim 20 wherein the step of reading said operational data comprises reading a serial bit stream from said memory through a serial data port.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-09 | 1999-10-09 | 2000-04-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-09 | 2003-10-09 | 2004-04-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-09 | 2007-10-09 | 2008-04-09 | $7700.00 | Window Closed / Lapsed |