US5504994A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating a receptacle connector for an IC card
Assignee: Molex LLC
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Filing: 1994-04-21
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Granted: 1996-04-09
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Expires: 2014-04-21
Abstract
Abstract A method is provided for fabricating a receptacle connector for use in an IC card assembly wherein the receptacle connector is adapted for mounting generally at an edge of a circuit substrate. A housing is provided with an upper surface and a plurality of terminal-receiving passages in a dual row configuration extend parallel to the upper surface. The circuit substrate is adapted to be located a given vertical distance from the upper surface of the housing. A plurality of receptacle terminals are inserted into the passages with surface mount tail portions of the terminals projecting outside the passages. The vertical distance between the circuit substrate and the top of the housing is determined. The tail portions of the two rows of terminals initially project in a generally straight planar array from a rear face of the housing. In a single final forming step, the surface mount tail portions are formed into coplanar curved contact portions such that the contact portions of the surface mount tail portions will engage a corresponding single row contact pad array on the edge of the circuit substrate when the receptacle connector is mounted generally thereon.
Inventors
- 👤 Emanuel G. Banakis
- 👤 Kenneth F. Janota
- 👤 Harold K. Lang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 00:29
CPC Classifications
H; H05; H05K; H05K5/00; H05K5/02; H05K5/0256; H05K5/026; H05K5/0265; H05K5/0269; H01; H01R; H01R12/00; H01R12/70; H01R12/71; H01R12/72; G; G06; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K19/077; G06K19/07743; H01R12/722; H01R12/725; H01R43/00; H01R43/20; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49204; Y10T29/49208; Y10T29/49222
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
198 words
A method of fabricating a receptacle connector for use in an IC card wherein the receptacle connector is adapted for mounting generally at an edge of a circuit substrate, comprising the steps of: providing a receptacle connector housing with a top surface and a plurality of terminal-receiving passages extending parallel thereto, said terminal-receiving passages being configured in a dual row array, wherein the circuit substrate is adapted to be located a given vertical distance from the top surface of the receptacle connector housing; inserting a plurality of receptacle terminals into both rows of passages, said receptacle terminals having mating portions located within the terminal-receiving passages and surface mount tail portions projecting from both rows of passages and terminating in a single generally straight planar array outside the passages; determining the given vertical distance between the circuit substrate and the top surface of the receptacle connector housing; and finally forming the planar array of surface mount tail portions in a single forming step to correspond to said given distance such that the surface mount tail portions engage a corresponding single row contact pad array on the edge of the circuit substrate when the receptacle connector is mounted generally thereat.
Claim 2
Independent Claim
198 words
A method of fabricating a receptacle connector for use in an IC card wherein the receptacle connector is adapted for mounting generally at an edge of a circuit substrate, comprising the steps of: providing a receptacle connector housing with a top surface and a plurality of terminal-receiving passages extending parallel thereto, said terminal-receiving passages being configured in a dual row array, wherein the circuit substrate is adapted to be located a given vertical distance from the top surface of the receptacle connector housing; inserting a plurality of receptacle terminals into both rows of passages, said receptacle terminals having mating portions located within the terminal-receiving passages and surface mount tail portions projecting from both rows of passages and terminating in a single generally straight planar array outside the passages; determining the given vertical distance between the circuit substrate and the top surface of the receptacle connector housing; and finally forming the planar array of surface mount tail portions in a single forming step to correspond to said given distance such that the surface mount tail portions engage a corresponding single row contact pad array on the edge of the circuit substrate when the receptacle connector is mounted generally thereat.
Claim 3
Dependent Claim
44 words
The method of claim 1 wherein said final forming step comprises forming the array of surface mount tail portions such that both rows of receptacle terminals are configured into generally coplanar curved contact portions for engaging the contact pad array of the circuit substrate.
Claim 4
Dependent Claim
64 words
The method of claim 1 wherein said mating portions of the receptacle terminals in the upper and lower rows of the terminal-receiving passages are substantially identical and wherein said inserting step includes inserting the receptacle terminals into the upper row of terminal receiving passages in a mirror image configuration with respect to the receptacle terminals inserted in the lower row of the terminal-receiving passages.
Claim 5
Dependent Claim
63 words
The method of claim 3 wherein the surface mount tail portions of the receptacle terminals inserted in the bottom row of the terminal-receiving passages include an offset to cause the surface mount tail portions of the bottom row of receptacle terminals to be in-line with the surface mount tail portions of the top row of receptacle terminals thereby defining the single planar array.
Claim 6
Dependent Claim
37 words
The method of claim 2 wherein the final forming step further includes simultaneously forming the curved contact portions to project slightly below a substrate-engaging surface of the housing to preload the contact portions and ensure coplanarity thereof.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-09 | 1999-10-09 | 2000-04-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-09 | 2003-10-09 | 2004-04-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-09 | 2007-10-09 | 2008-04-09 | $7700.00 | Window Closed / Lapsed |