US5498885A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Modulation circuit
Assignee: Benhov GmbH LLC
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Filing: 1994-09-26
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Granted: 1996-03-12
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Expires: 2014-09-26
Abstract
Abstract An integrated circuit is provided with particular application for high frequency modulation circuits, such as a mixer circuit, with reduced noise and gain. The circuit provides a novel application of a single device comprising a 4 or 5 terminal, gate controlled lateral bipolar junction transistor device, in the form of a merged MOS and lateral bipolar transistor. In a grounded base configuration, RF and LO signals are applied to the gate and emitter terminals respectively and provide for modulated output at the collector, and provides signal modulation with reduced noise compared with multi-device implementations of known mixer circuits using a summation circuit, diodes and FETs. Advantageously, operation of the device in the grounded base or grounded emitter configuration provides for strong modulation of the DC current gain, i.e. over 4 decades, as a function of gate voltage.
Inventors
- 👤 M. Jamal Deen
- 👤 Duljit S. Malhi
- 👤 Zhixin Yan
- 👤 Robert A. Hadaway
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 09:51
CPC Classifications
H; H03; H03D; H03D7/00; H03D7/12; H10; H10D; H10D12/00; H10D12/411
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
130 words
A integrated circuit for modulating signals comprising: a four terminal gate controlled lateral bipolar junction transistor (GCLBJT) formed on semiconductor substrate, comprising an emitter region, a collector region, a base region extending laterally therebetween, and a gate electrode extending over the base region between the emitter and collector, said four terminals being provided to the emitter, base, collector and gate respectively, means for providing a first input signal to the one of the emitter and base terminals, the other said terminal being grounded, and means for providing a second input signal to the gate terminal, whereby during operation of the device, an output signal is generated at the collector terminal which is a result of the gate voltage controlled modulation of the first input signal and the second input signal
Claim 2
Dependent Claim
130 words
A integrated circuit for modulating signals comprising: a four terminal gate controlled lateral bipolar junction transistor (GCLBJT) formed on semiconductor substrate, comprising an emitter region, a collector region, a base region extending laterally therebetween, and a gate electrode extending over the base region between the emitter and collector, said four terminals being provided to the emitter, base, collector and gate respectively, means for providing a first input signal to the one of the emitter and base terminals, the other said terminal being grounded, and means for providing a second input signal to the gate terminal, whereby during operation of the device, an output signal is generated at the collector terminal which is a result of the gate voltage controlled modulation of the first input signal and the second input signal
Claim 3
Dependent Claim
49 words
A structure according to claim 1 wherein the device is configured in a grounded base configuration, and the first input (RF) signal is provided to the emitter terminal, the second (LO) signal is provided to the gate terminal whereby the output (IF) signal is generated at the collector terminal.
Claim 4
Dependent Claim
49 words
A structure according to claim 1 wherein the device is configured in a grounded emitter configuration, and the first input (RF) signal is provided to the base terminal, the second (LO) signal is provided to the gate terminal whereby the output (IF) signal is generated at the collector terminal.
Claim 5
Dependent Claim
171 words
An integrated circuit structure according to claim 1 wherein the GCLBJT takes the form of a merged MOS and bipolar transistor device, formed on a semiconductor substrate of a first conductivity type, having a heavily doped buried layer defined therein forming a buried base electrode, first and second laterally spaced apart, heavily doped regions forming a source/emitter and a drain/collector of the merged field effect/bipolar transistor, and a channel/base region provided therebetween and a gate electrode formed on the surface of the channel region and isolated from the channel region by a gate oxide layer, the device thereby having four terminals, and the device being operable by application of a voltage Vg on the gate electrode, with Vg>vfb whereby the gate voltage modulates the collector current path through the base region under the gate electrode so that the application of a first input signal comprising an RF signal generates an output signal IF which is strongly modulated by the Vg as a result of LO input signal to the gate electrode.
Claim 6
Dependent Claim
29 words
A structure according to claim 4 wherein the threshold voltage of the MOS channel is determined by selectively doping the surface region of the substrate under the gate electrode.
Claim 7
Dependent Claim
52 words
A structure according to claim 4 wherein the effective MOS channel width and effective base width of the GCLBJT is controlled by lightly doped regions in the surface of the substrate adjacent the emitter and collector, said lightly doped regions being of the same conductivity type as the emitter and collector regions.
Claim 8
Independent Claim
92 words
A method of operating a GCLBJT as a modulation circuit, the GCLBJT comprising emitter, collector, base and gate terminals and the method comprising: providing a first input (RF) signal to the one of the emitter and base terminals, the other of said terminals being grounded, providing a second input (LO) signal to the gate terminal, whereby during operation of the device, an output (IF) signal generated at the collector terminal which is a result of the gate voltage controlled modulation of the first input RF signal and the second input LO signal.
Claim 9
Independent Claim
92 words
A method of operating a GCLBJT as a modulation circuit, the GCLBJT comprising emitter, collector, base and gate terminals and the method comprising: providing a first input (RF) signal to the one of the emitter and base terminals, the other of said terminals being grounded, providing a second input (LO) signal to the gate terminal, whereby during operation of the device, an output (IF) signal generated at the collector terminal which is a result of the gate voltage controlled modulation of the first input RF signal and the second input LO signal.
Claim 10
Dependent Claim
52 words
A method according to claim 7 wherein the device is configured in grounded base mode to be operable to function as a mixer circuit by application of the first signal to the emitter terminal, the second (LO) signal to the gate terminal, thereby generating the modulated (IF) signal at the collector terminal.
Claim 11
Dependent Claim
52 words
A method according to claim 7 wherein the device is configured in grounded emitter mode to be operable to function as a mixer circuit by application of the first signal to the base terminal, the second (LO) signal to the gate terminal, thereby generating the modulated (IF) signal at the collector terminal.
Claim 12
Dependent Claim
70 words
A method according to claim 7 wherein the gate voltage is Vgs is greater than the flatband voltage thereby turning off the MOS channel of the device, whereby the device operates predominantly as a lateral bipolar transistor in which the path of collector current Ic through the base region is controlled by the gate voltage, and is moved deeper into the substrate by increasing the magnitude of the gate voltage.
Claim 13
Dependent Claim
68 words
A method according to claim 7 wherein the GCLBJT is structured as a merged PMOS/PNP LBJT device, and is operated in the region Vgs> flatband voltage and Vgs<Vt whereby the PMOS device is operated in weak inversion, the thickness of the depletion layer being strongly dependent on the voltage across the gate and base region so that lateral PNP device characteristics are strongly dependent on the gate voltage.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-03-12 | 1999-09-11 | 2000-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-03-12 | 2003-09-11 | 2004-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-03-12 | 2007-09-11 | 2008-03-12 | $7700.00 | Window Closed / Lapsed |