US5493660A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Software assisted hardware TLB miss handler
Assignee: HP Inc
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Filing: 1992-10-06
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Granted: 1996-02-20
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Expires: 2012-10-06
Abstract
Abstract The present invention provides a software-assisted hardware TLB miss-handler which is designed to reduce the TLB miss penalty while being low cost to implement and requiring little chip area or complexity. When a TLB miss occurs, the HW TLB miss handler of the present invention computes a physical address of a page table entry located in a special hardware-visible table based on a missing virtual address. It accesses the page table entry and checks for a correct translation and status information. If correct, a physical page address and protection information of the page table entry are inserted into the TLB. The original virtual address is re-translated and normal program execution continues. If the correct translation and status are not found, the HW TLB miss-handler will not insert the entry and will trap to a more sophisticated SW TLB miss handler. A pointer to the page table entry is passed to the SW TLB miss handler so that the page table address need not be recomputed. Thus, the HW TLB miss-handler of the present invention services the simplest and most common TLB misses very quickly, reducing the overall TLB miss penalty. The slower SW TLB miss handler services the more complex and less common TLB misses and provides flexibility in the virtual memory management system.
Inventors
- 👤 Eric R. DeLano
- 👤 Michael A. Buckley
- 👤 Duncan C. Weir
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 06:45
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/1027
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
249 words
A computer-based system for handling translation lookaside buffer (TLB) misses, the system comprising: a memory unit for storing blocks of dam, wherein each block of data is accessed via a virtual address; a TLB for storing address translation information for translating said virtual address to a physical address for each block of data in said memory unit; a hardware TLB miss handler, coupled to said TLB, adapted to hash said virtual address to form a physical address pointer into a physical page directory, and further adapted to check a hardware-visible portion of said physical page directory for a missing translation, wherein said hardware TLB miss handler comprises: hashing means for hashing said virtual address to form a first pointer by XORing the most significant bits of said virtual address with the least significant bits of said virtual address; masking means for performing a bitwise logical AND function on said first pointer and a mask register to form a second pointer, and merging means for performing a bitwise logical OR function on said second pointer and the most significant bits of a base-address register to form said physical address pointer; and a software TLB miss handler adapted to accept said physical address pointer from said hardware TLB miss handler if said hardware TLB miss handler does not locate the missing translation in the hardware-visible portion of said physical page directory, said software TLB miss handler further adapted to check the remainder of said physical page directory for the missing translation.
Claim 2
Dependent Claim
249 words
A computer-based system for handling translation lookaside buffer (TLB) misses, the system comprising: a memory unit for storing blocks of dam, wherein each block of data is accessed via a virtual address; a TLB for storing address translation information for translating said virtual address to a physical address for each block of data in said memory unit; a hardware TLB miss handler, coupled to said TLB, adapted to hash said virtual address to form a physical address pointer into a physical page directory, and further adapted to check a hardware-visible portion of said physical page directory for a missing translation, wherein said hardware TLB miss handler comprises: hashing means for hashing said virtual address to form a first pointer by XORing the most significant bits of said virtual address with the least significant bits of said virtual address; masking means for performing a bitwise logical AND function on said first pointer and a mask register to form a second pointer, and merging means for performing a bitwise logical OR function on said second pointer and the most significant bits of a base-address register to form said physical address pointer; and a software TLB miss handler adapted to accept said physical address pointer from said hardware TLB miss handler if said hardware TLB miss handler does not locate the missing translation in the hardware-visible portion of said physical page directory, said software TLB miss handler further adapted to check the remainder of said physical page directory for the missing translation.
Claim 3
Dependent Claim
226 words
In a computer-based system having a translation lookaside buffer (TLB) which is adapted to accept a virtual address and return a physical address translation, a method for handling TLB misses, comprising the steps of: (a) generating with a hardware TLB miss handler a physical address pointer into a physical page directory based on the virtual address to locate the physical address translation; (b) hashing the virtual address to form a first pointer, said hashing including XORing the most significant bits of the virtual address with the least significant bits of the virtual address; (c) performing a bitwise logical AND function on said first pointer and a mask register to form a second pointer; (d) performing a bitwise logical OR function on said second pointer and the most significant bits of a base-address register to form the physical address pointer (e) searching a hardware-visible portion of said physical page directory for the physical address translation using the physical address pointer; (f) trapping to a software TLB miss handler if said hardware-visible portion of said physical page directory does not contain the physical address translation, wherein the physical address pointer is passed to said software TLB miss handler during said trapping step; and (g) searching with said software TLB miss handler the remainder of said physical page directory for the physical address translation using the physical address pointer.
Claim 4
Dependent Claim
226 words
In a computer-based system having a translation lookaside buffer (TLB) which is adapted to accept a virtual address and return a physical address translation, a method for handling TLB misses, comprising the steps of: (a) generating with a hardware TLB miss handler a physical address pointer into a physical page directory based on the virtual address to locate the physical address translation; (b) hashing the virtual address to form a first pointer, said hashing including XORing the most significant bits of the virtual address with the least significant bits of the virtual address; (c) performing a bitwise logical AND function on said first pointer and a mask register to form a second pointer; (d) performing a bitwise logical OR function on said second pointer and the most significant bits of a base-address register to form the physical address pointer (e) searching a hardware-visible portion of said physical page directory for the physical address translation using the physical address pointer; (f) trapping to a software TLB miss handler if said hardware-visible portion of said physical page directory does not contain the physical address translation, wherein the physical address pointer is passed to said software TLB miss handler during said trapping step; and (g) searching with said software TLB miss handler the remainder of said physical page directory for the physical address translation using the physical address pointer.
References Cited (Backward Citations)
US5060137A
Cited
US4774653A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-02-19 | 1999-08-21 | 2000-02-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-19 | 2003-08-21 | 2004-02-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-19 | 2007-08-21 | 2008-02-20 | $7700.00 | Window Closed / Lapsed |