US5491455A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Differential-to-single ended translator that generates an output signal with very small signal distortion
Assignee: National Semiconductor Corp
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Filing: 1994-11-10
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Granted: 1996-02-13
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Expires: 2014-11-10
Abstract
Abstract A translator circuit amplifies a pair of differential input signals to produce a pair of intermediate differential signals by utilizing a pair of cross-coupled differential gain stages. The gain stages amplify the input signals to balance the capacitive loading. The pair of intermediate differential signals are formed to be substantially equal and 180° out of phase. The current sources of the gain stages are connected together and controlled by the outputs of the gain stages to reduce the rise and fall times of the intermediate differential signals. The translator circuit also converts the pair of intermediate differential signals to a single-ended output signal by utilizing a first differential pair to produce the output signal, and a second differential pair to adaptively control the current source of the first differential pair, thereby reducing the rise and fall times of the output signal. As a result, the translator circuit is capable of producing the output signal with minimum distortion. Therefore, a duty cycle of approximately 50% can be achieved.
Inventors
- 👤 James R. Kuo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 12:05
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45179; H03F1/00; H03F1/32; H03F1/3211; H03F3/4521; H03K; H03K5/00; H03K5/22; H03K5/24; H03K5/2472; H03K5/2481; H03F2203/00; H03F2203/45; H03F2203/45004; H03F2203/45051; H03F2203/45188; H03F2203/45241; H03F2203/45466
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
206 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto, the first input amplifier including: a first current source having an output, a first differential pair connected to the output of the first current source, the first differential pair having an output node, and a first current mirror subcircuit connected to the first differential pair; a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal, the second input amplifier including: a second current source having an output, a second differential pair connected to the output of the second current source, the second differential pair having an output node, and a second current mirror subcircuit connected to the second differential pair; and a conversion circuit that converts the first amplified signal and the second amplified signal into the single-ended output signal, wherein the output of the first current source is connected to the output of the second current source.
Claim 2
Dependent Claim
206 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto, the first input amplifier including: a first current source having an output, a first differential pair connected to the output of the first current source, the first differential pair having an output node, and a first current mirror subcircuit connected to the first differential pair; a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal, the second input amplifier including: a second current source having an output, a second differential pair connected to the output of the second current source, the second differential pair having an output node, and a second current mirror subcircuit connected to the second differential pair; and a conversion circuit that converts the first amplified signal and the second amplified signal into the single-ended output signal, wherein the output of the first current source is connected to the output of the second current source.
Claim 3
Dependent Claim
49 words
The translator of claim 1 wherein the first current source includes a first transistor having a gate, and wherein the second current source includes a second transistor having a gate, and wherein the output node of the first differential pair is connected to the gate of the first transistor.
Claim 4
Dependent Claim
23 words
The translator of claim 2 wherein the output node of the second differential pair is connected to the gate of the second transistor.
Claim 5
Dependent Claim
196 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising:. a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto; a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal; and a conversion circuit that converts the first amplified signal and the second amplified signal into the single-ended output signal, the conversion circuit including: a first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an output signal in response thereto; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that controls the tail current.
Claim 6
Dependent Claim
196 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising:. a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto; a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal; and a conversion circuit that converts the first amplified signal and the second amplified signal into the single-ended output signal, the conversion circuit including: a first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an output signal in response thereto; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that controls the tail current.
Claim 7
Dependent Claim
241 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto; a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal; and a conversion circuit that converts the first amplified signal and the second amplified signal into the single-ended output signal, the conversion circuit including: a first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an output signal in response thereto, the first conversion amplifier including: a first current source having an input; a first differential pair connected to the input of the first current source, the first differential pair having an output node; and a first current mirror subcircuit connected to the first differential pair; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that controls the tail current.
Claim 8
Dependent Claim
241 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto; a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal; and a conversion circuit that converts the first amplified signal and the second amplified signal into the single-ended output signal, the conversion circuit including: a first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an output signal in response thereto, the first conversion amplifier including: a first current source having an input; a first differential pair connected to the input of the first current source, the first differential pair having an output node; and a first current mirror subcircuit connected to the first differential pair; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first amplified signal and the second amplified signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that controls the tail current.
Claim 9
Dependent Claim
51 words
The translator of claim 5 wherein the second input amplifier includes: a second current source having an input; a second differential pair connected to the input of the second current source, the second differential pair having an output node; and a second current mirror subcircuit connected to the second differential pair.
Claim 10
Dependent Claim
30 words
The translator of claim 6 wherein the first current source includes a first transistor having a gate, and wherein the second current source includes a second transistor having a gate.
Claim 11
Dependent Claim
18 words
The translator of claim 7 wherein the voltage divider is connected to the gate of the second transistor.
Claim 12
Dependent Claim
23 words
The translator of claim 8 wherein the output node of the second differential pair is connected to the gate of the first transistor.
Claim 13
Independent Claim
144 words
A method for converting a pair of input signals into a single-ended output signal, the method comprising the steps of: amplifying the difference between the pair of input signals, and outputting a first amplified signal in response thereto; amplifying the difference between the pair of input signals, and outputting a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal; and converting the first amplified signal and the second amplified signal into the single-ended output signal by: amplifying the difference between the first amplified signal and the second amplified signal, and outputting an output signal in response thereto; and amplifying the difference between the first amplified signal and the second amplified signal, and outputting an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal.
Claim 14
Independent Claim
144 words
A method for converting a pair of input signals into a single-ended output signal, the method comprising the steps of: amplifying the difference between the pair of input signals, and outputting a first amplified signal in response thereto; amplifying the difference between the pair of input signals, and outputting a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal; and converting the first amplified signal and the second amplified signal into the single-ended output signal by: amplifying the difference between the first amplified signal and the second amplified signal, and outputting an output signal in response thereto; and amplifying the difference between the first amplified signal and the second amplified signal, and outputting an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal.
Claim 15
Dependent Claim
116 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first conversion amplifier that amplifies the difference between a first input signal and a second input signal, and outputs an output signal in response thereto; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first input signal and the second input signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that outputs a constant voltage that controls the tail current.
Claim 16
Dependent Claim
116 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first conversion amplifier that amplifies the difference between a first input signal and a second input signal, and outputs an output signal in response thereto; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first input signal and the second input signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that outputs a constant voltage that controls the tail current.
Claim 17
Dependent Claim
246 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first conversion amplifier that amplifies the difference between a first input signal and a second input signal, and outputs an output signal in response thereto, the first conversion amplifier including: a first current source having an input; a first differential pair connected to the input of the first current source, the first differential pair having an output node; and a first current mirror subcircuit connected to the first differential pair, wherein the second input amplifier includes: a second current source having an input; a second differential pair connected to the input of the second current source, the second differential pair having an output node; and a second current mirror subcircuit connected to the second differential pair, wherein the first current source includes a first transistor having a gate, and wherein the second current source includes a second transistor having a gate, and wherein the output node of the second differential pair is connected to the gate of the first transistor; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first input signal and the second input signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that controls the tail current.
Claim 18
Dependent Claim
246 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a first conversion amplifier that amplifies the difference between a first input signal and a second input signal, and outputs an output signal in response thereto, the first conversion amplifier including: a first current source having an input; a first differential pair connected to the input of the first current source, the first differential pair having an output node; and a first current mirror subcircuit connected to the first differential pair, wherein the second input amplifier includes: a second current source having an input; a second differential pair connected to the input of the second current source, the second differential pair having an output node; and a second current mirror subcircuit connected to the second differential pair, wherein the first current source includes a first transistor having a gate, and wherein the second current source includes a second transistor having a gate, and wherein the output node of the second differential pair is connected to the gate of the first transistor; a second conversion amplifier connected to the first conversion amplifier that amplifies the difference between the first input signal and the second input signal, and outputs an intermediate signal in response thereto, the intermediate signal controlling the rise and fall times of the output signal, the second conversion amplifier having a tail current; and a voltage divider connected to the second conversion amplifier that controls the tail current.
Claim 19
Dependent Claim
163 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a single constant current source having an output; a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto, wherein the first input amplifier includes: a first differential pair connected to the output of the current source, the first differential pair having an output node; and a first current mirror subcircuit connected to the first differential pair; and a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal, wherein the second input amplifier includes: a second differential pair connected to the output of the current source, the second differential pair having an output node; and a second current mirror subcircuit connected to the second differential pair.
Claim 20
Dependent Claim
163 words
A translator for converting a pair of input signals into a single-ended output signal, the translator comprising: a single constant current source having an output; a first input amplifier that amplifies the difference between the pair of input signals, and outputs a first amplified signal in response thereto, wherein the first input amplifier includes: a first differential pair connected to the output of the current source, the first differential pair having an output node; and a first current mirror subcircuit connected to the first differential pair; and a second input amplifier that amplifies the difference between the pair of input signals, and outputs a second amplified signal in response thereto, the second amplified signal being approximately 180° out of phase from the first amplified signal, wherein the second input amplifier includes: a second differential pair connected to the output of the current source, the second differential pair having an output node; and a second current mirror subcircuit connected to the second differential pair.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-02-12 | 1999-08-14 | 2000-02-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-12 | 2003-08-14 | 2004-02-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-12 | 2007-08-14 | 2008-02-13 | $7700.00 | Window Closed / Lapsed |