US5491113A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing semiconductor device having a planarized surface
Assignee: Toshiba Corp
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Filing: 1995-03-08
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Granted: 1996-02-13
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Expires: 2015-03-08
Abstract
Abstract In a method of manufacturing a semiconductor device, an interlayer insulating film is formed along a surface of a semiconductor substrate having a stepped surface. A stopper surface is formed at least at a recess in the interlayer insulating film. The interlayer insulating film and the stopper film are polished until the interlayer insulating film and the stopper film are exposed on the same plane. The stopper film remaining after the polishing is etched and removed. The interlayer insulating film is polished and flattened.
Inventors
- 👤 Masayuki Murota
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 14:22
CPC Classifications
H; H10; H10P; H10P95/00; H10P95/06; H10P95/062; Y; Y10; Y10S; Y10S438/00; Y10S438/959; Y10S438/97
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
86 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an interlayer insulating film along a surface of a semiconductor substrate having a stepped surface; forming a stopper film at least at a recess portion in said interlayer insulating film; polishing said interlayer insulating film and said stopper film until said interlayer insulating film and said stopper film are exposed on the same plane; etching and removing said stopper film remaining after said polishing step; and then polishing and flattening said interlayer insulating film.
Claim 2
Independent Claim
86 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an interlayer insulating film along a surface of a semiconductor substrate having a stepped surface; forming a stopper film at least at a recess portion in said interlayer insulating film; polishing said interlayer insulating film and said stopper film until said interlayer insulating film and said stopper film are exposed on the same plane; etching and removing said stopper film remaining after said polishing step; and then polishing and flattening said interlayer insulating film.
Claim 3
Dependent Claim
29 words
The method according to claim 1, wherein in said step of forming said stopper film, said stopper film is formed along an entire surface of said interlayer insulating film.
Claim 4
Dependent Claim
20 words
The method according to claim 1, wherein said stopper film has a lower polishing rate than said interlayer insulating film.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-02-12 | 1999-08-14 | 2000-02-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-12 | 2003-08-14 | 2004-02-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-12 | 2007-08-14 | 2008-02-13 | $7700.00 | Window Closed / Lapsed |