US5485127A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated dynamic power dissipation control system for very large scale integrated (VLSI) chips
Assignee: Intel Corp
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Filing: 1995-04-07
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Granted: 1996-01-16
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Expires: 2015-04-07
Abstract
Abstract Chip logic, a frequency multiplication and/or division, a temperature sensing circuit, and a power management circuit, are integrated on a very large scale integrated (VLSI) circuit chip. The temperature sensing circuit directly measures the chip temperature, producing a temperature output signal. The power management circuit, which is connected to the temperature sensing circuit and to the chip logic, responds to the temperature output signal and to a functional state of the chip logic to generate a control signal to the PLL. The PLL responds to the control signal to either stop the clock signal or modify the operating frequency of the clock signal, depending upon the state of the control signal.
Inventors
- 👤 Renitia J. Bertoluzzi
- 👤 Robert T. Jackson
- 👤 Stephen D. Weitzel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 17:18
CPC Classifications
H; H03; H03L; H03L1/00; H03L1/02; H03L1/022; H03L1/027; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L1/04
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
119 words
An apparatus including an integrated circuit chip, said apparatus comprising: chip logic including a functional state output; sensing means for measuring a temperature of said chip; clocking means having a clock output connected to said chip logic; and, power management means connected to said functional state output of said chip logic, to said sensing means and to said clocking means; said power management means including control means responsive to said sensing means and to said functional state output of said chip logic for generating a control signal to said clocking means; said clocking means including selecting means responsive to said control signal for changing an operating frequency of said clocking means, depending upon a state of said control signal.
Claim 2
Independent Claim
119 words
An apparatus including an integrated circuit chip, said apparatus comprising: chip logic including a functional state output; sensing means for measuring a temperature of said chip; clocking means having a clock output connected to said chip logic; and, power management means connected to said functional state output of said chip logic, to said sensing means and to said clocking means; said power management means including control means responsive to said sensing means and to said functional state output of said chip logic for generating a control signal to said clocking means; said clocking means including selecting means responsive to said control signal for changing an operating frequency of said clocking means, depending upon a state of said control signal.
Claim 3
Dependent Claim
37 words
The apparatus in accordance with claim 1 wherein: said clocking means includes programmable frequency means; and, said selecting means includes programming means for changing said programmable frequency means to a different operating frequency of said clocking means.
Claim 4
Independent Claim
134 words
An apparatus including an integrated circuit chip, said apparatus comprising: chip logic including a functional state output; sensing means for measuring a temperature of said chip; clocking means having a clock output connected to said chip logic; and, power management means connected to said functional state output of said chip logic, to said clocking means and to said clocking means; said power management means including control means responsive to said sensing means and to said functional state output of said chip logic for generating a control signal to said clocking means; said clocking means including selecting means responsive to said control signal for changing an operating frequency of said clocking means, depending upon a state of said control signal; said selecting means including gate means at said clock output for inhibiting said clock output.
Claim 5
Independent Claim
134 words
An apparatus including an integrated circuit chip, said apparatus comprising: chip logic including a functional state output; sensing means for measuring a temperature of said chip; clocking means having a clock output connected to said chip logic; and, power management means connected to said functional state output of said chip logic, to said clocking means and to said clocking means; said power management means including control means responsive to said sensing means and to said functional state output of said chip logic for generating a control signal to said clocking means; said clocking means including selecting means responsive to said control signal for changing an operating frequency of said clocking means, depending upon a state of said control signal; said selecting means including gate means at said clock output for inhibiting said clock output.
Claim 6
Dependent Claim
36 words
The apparatus in accordance with claim 1 wherein: said selecting means includes means for selectively either disabling said clock output or modifying an operating frequency of said clocking means, depending upon states of said control signal.
Claim 7
Dependent Claim
19 words
The integrated circuit chip in accordance with claim 4 wherein: said clocking means is a phase locked loop clock.
Claim 8
Dependent Claim
19 words
The integrated circuit chip in accordance with claim 3 wherein: said clocking means is a phase locked loop clock.
Claim 9
Dependent Claim
38 words
The integrated circuit chip in accordance with claim 3 wherein: said selecting means includes means for selectively either disabling said clock output or modifying an operating frequency of said clocking means, depending upon states of said control signal.
Claim 10
Dependent Claim
19 words
The integrated circuit chip in accordance with claim 7 wherein: said clocking means is a phase locked loop clock.
Claim 11
Dependent Claim
19 words
The integrated circuit chip in accordance with claim 3 wherein: said clocking means is a phase locked loop clock.
Claim 12
Independent Claim
160 words
An apparatus including an integrated circuit chip, said apparatus comprising: a chip logic on said integrated circuit chip, said chip logic including a functional state output; a temperature sensing circuit having a temperature output signal; said temperature sensing circuit being located such that said temperature sensing circuit detects a temperature of said integrated circuit chip; a frequency modifying circuit having a clock output connected to said chip logic; a power management circuit connected to said functional state output of said chip logic and to said temperature output signal; and, a control signal connected between said power management circuit and said frequency modifying circuit; said power management circuit changing a state of said control signal in response to said temperature output signal and to said functional state output of said chip logic; said frequency modifying circuit including a frequency modifying circuit logic that changes an operating frequency of said frequency modifying circuit in response to said state of said control signal.
Claim 13
Independent Claim
160 words
An apparatus including an integrated circuit chip, said apparatus comprising: a chip logic on said integrated circuit chip, said chip logic including a functional state output; a temperature sensing circuit having a temperature output signal; said temperature sensing circuit being located such that said temperature sensing circuit detects a temperature of said integrated circuit chip; a frequency modifying circuit having a clock output connected to said chip logic; a power management circuit connected to said functional state output of said chip logic and to said temperature output signal; and, a control signal connected between said power management circuit and said frequency modifying circuit; said power management circuit changing a state of said control signal in response to said temperature output signal and to said functional state output of said chip logic; said frequency modifying circuit including a frequency modifying circuit logic that changes an operating frequency of said frequency modifying circuit in response to said state of said control signal.
Claim 14
Dependent Claim
42 words
The apparatus in accordance with claim 10 wherein: said frequency modifying circuit logic includes a programmable frequency divider; and, said programmable frequency divider providing a different operating frequency of said frequency modifying circuit in response to said state of said control signal.
Claim 15
Dependent Claim
20 words
The integrated circuit chip in accordance with claim 11 wherein: said frequency modifying circuit is a phase locked loop clock.
Claim 16
Dependent Claim
50 words
The apparatus in accordance with claim 10 wherein: said frequency modifying circuit includes a programmable frequency divider; and, said means responsive to said control signal includes means for selectively either disabling said frequency modifying circuit clock output or modifying an operating frequency thereof, depending upon states of said control signal.
Claim 17
Dependent Claim
20 words
The integrated circuit chip in accordance with claim 10 wherein: said frequency modifying circuit is a phase locked loop clock.
Claim 18
Dependent Claim
126 words
An integrated circuit chip comprising: a chip logic including a functional state output; a temperature sensing circuit; a frequency modifying circuit having a clock output connected to said chip logic; and, a power management circuit connected to said chip logic, to said temperature sensing circuit and to said frequency modifying circuit; said power management circuit including means responsive to said temperature output signal and to said functional state output of said chip logic for generating a control signal to said frequency, modifying circuit; said frequency modifying circuit including means responsive to said control signal for changing an operating frequency thereof, depending upon a state of said control signal; said means responsive to said control signal including a gate at an output of said frequency modifying circuit.
Claim 19
Dependent Claim
126 words
An integrated circuit chip comprising: a chip logic including a functional state output; a temperature sensing circuit; a frequency modifying circuit having a clock output connected to said chip logic; and, a power management circuit connected to said chip logic, to said temperature sensing circuit and to said frequency modifying circuit; said power management circuit including means responsive to said temperature output signal and to said functional state output of said chip logic for generating a control signal to said frequency, modifying circuit; said frequency modifying circuit including means responsive to said control signal for changing an operating frequency thereof, depending upon a state of said control signal; said means responsive to said control signal including a gate at an output of said frequency modifying circuit.
Claim 20
Dependent Claim
19 words
The integrated circuit chip in accordance with claim 15 wherein: said clocking means is a phase locked loop clock.
Claim 21
Dependent Claim
20 words
The integrated circuit chip in accordance with claim 15 wherein: said frequency modifying circuit is a phase locked loop clock.
Claim 22
Independent Claim
84 words
A method of controlling heat dissipation in an integrated circuit chip having chip logic thereon, said chip logic including a functional state output; a method comprising steps of: A. establishing a threshold temperature (T); B. sensing a temperature (t) of said chip; C. clocking said chip with an output of a frequency modifying circuit connected to said chip logic; and, D. modifying said output of said frequency modifying ,circuit in accordance with a predetermined relationship between said temperature (t) and said threshold temperature (T).
Claim 23
Independent Claim
84 words
A method of controlling heat dissipation in an integrated circuit chip having chip logic thereon, said chip logic including a functional state output; a method comprising steps of: A. establishing a threshold temperature (T); B. sensing a temperature (t) of said chip; C. clocking said chip with an output of a frequency modifying circuit connected to said chip logic; and, D. modifying said output of said frequency modifying ,circuit in accordance with a predetermined relationship between said temperature (t) and said threshold temperature (T).
Claim 24
Dependent Claim
46 words
The method in accordance with claim 18 wherein said frequency modifying circuit includes programmable logic, said step D including a step of: E. programming said programmable logic to a higher frequency value upon a condition that said temperature (t) is greater than said threshold temperature (T).
Claim 25
Dependent Claim
46 words
The method in accordance with claim 18 wherein said frequency modifying circuit includes programmable logic, said step D including the step of: E. programming said programmable logic to a higher frequency value upon a condition that said temperature (t) is lower than said threshold temperature (T).
Claim 26
Dependent Claim
43 words
The method in accordance with claim 18 wherein said step D includes a step of: E. preventing said output of said frequency modifying circuit from reaching said chip logic upon a condition that said temperature (t) is greater than said threshold temperature (T).
Claim 27
Independent Claim
112 words
A method of controlling heat dissipation in an integrated circuit chip having chip logic thereon, said chip logic including a functional state output; a method comprising steps of: A. establishing a threshold temperature (T); B. sensing a temperature (t) of said chip; C. clocking said chip with an output of a frequency modifying circuit connected to said chip logic; D. modifying said output of said frequency modifying circuit in accordance with a predetermined relationship between said temperature (t) and said threshold temperature (T); and, E. preventing said output of said frequency modifying circuit from reaching said chip logic upon a condition that said temperature (t) is greater than said threshold temperature (T).
Claim 28
Independent Claim
112 words
A method of controlling heat dissipation in an integrated circuit chip having chip logic thereon, said chip logic including a functional state output; a method comprising steps of: A. establishing a threshold temperature (T); B. sensing a temperature (t) of said chip; C. clocking said chip with an output of a frequency modifying circuit connected to said chip logic; D. modifying said output of said frequency modifying circuit in accordance with a predetermined relationship between said temperature (t) and said threshold temperature (T); and, E. preventing said output of said frequency modifying circuit from reaching said chip logic upon a condition that said temperature (t) is greater than said threshold temperature (T).
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-01-15 | 1999-07-17 | 2000-01-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-01-15 | 2003-07-17 | 2004-01-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-01-15 | 2007-07-17 | 2008-01-16 | $7700.00 | Window Closed / Lapsed |