Method of using associative memories and an associative memory

Claim 2

An associative memory comprising: a plurality of word memories for storing a plurality of storage data belonging to a plurality of data groups, respectively; and a match detection circuit having a first mode that produces a match signal representative of a match on a match line associated with the predetermined word memory when a match is detected between storage data stored in a predetermined word memory and entered reference data, and a second mode that produces a match signal on a match line associated with the predetermined word memory when the match is detected in a predetermined word memory during a current retrieval and a match was detected in an arbitrary word memory storing storage data constituting a data group belonging to the storage data stored in the predetermined word memory during a previous retrieval.

Claim 3

An associative memory comprising: a plurality of word memories for storing a plurality of storage data belonging to a plurality of data groups, each data group comprising a set of a plurality of storage data, each consisting of a pair of attribute and data, respectively; attribute match detection circuits for detecting one of a match and a mismatch between stored attributes in storage data associated with the plurality of word memories, respectively, and applied attribute in a reference data consisting of a pair of attribute and data; data match detection circuits for detecting one of a match and a mismatch between stored data in the storage data consisting of a pair of attribute and data associated with the plurality of word memories, respectively, and applied data in a reference data consisting of a pair of attribute and data; registers for storing information concerning one of a match and a mismatch between, at least one of data in storage data consisting of a pair of attribute and data associated with the plurality of word memories, respectively, and applied data in the reference data consisting of a pair of attribute and data, each register corresponding to the associated one of said plurality of word memories; data lines provided on each word memory group consisting of word memories, each word memory for storing storage data constituting the same data group; first switch circuits for transmitting to the associated one of said data lines a retrieval result concerning one of a match and a mismatch when a match of attribute during a current retrieval is received from said attribute match detection circuit, the retrieval result having been stored in the associated said register during a previous retrieval, each first switch circuit corresponding to the associated one of said plurality of word memories; and gate circuits for transmitting to the associated one of said registers information representing a match through the current retrieval when a match of data by said data match detection circuit during a current retrieval is detected and when information representing a match during a previous retrieval is supplied to the associated one of said data lines, each gate circuit corresponding to the associated one of said plurality of word memories.

Claim 4

An associative memory comprising: a plurality of word memories for storing a plurality of storage data belonging to a plurality of data groups, each data group comprising a set of a plurality of storage data, each consisting of a pair of attribute and data, respectively; attribute match detection circuits for detecting one of a match and a mismatch between stored attributes in storage data associated with the plurality of word memories, respectively, and applied attribute in a reference data consisting of a pair of attribute and data; data match detection circuits for detecting one of a match and a mismatch between stored data in the storage data consisting of a pair of attribute and data associated with the plurality of word memories, respectively, and applied data in a reference data consisting of a pair of attribute and data; registers for storing information concerning one of a match and a mismatch between, at least one of data in storage data consisting of a pair of attribute and data associated with the plurality of word memories, respectively, and applied data in the reference data consisting of a pair of attribute and data, each register corresponding to the associated one of said plurality of word memories; data lines provided on each word memory group consisting of word memories, each word memory for storing storage data constituting the same data group; first switch circuits for transmitting to the associated one of said data lines a retrieval result concerning one of a match and a mismatch when a match of attribute during a current retrieval is received from said attribute match detection circuit, the retrieval result having been stored in the associated said register during a previous retrieval, each first switch circuit corresponding to the associated one of said plurality of word memories; and gate circuits for transmitting to the associated one of said registers information representing a match through the current retrieval when a match of data by said data match detection circuit during a current retrieval is detected and when information representing a match during a previous retrieval is supplied to the associated one of said data lines, each gate circuit corresponding to the associated one of said plurality of word memories.

Claim 5

An associative memory according to claim 2, further comprising attribute discriminating circuits for discriminating whether attribute of storage data stored in the associated one of said plurality of word memories comprises a predetermined attribute, each attribute discriminating circuit corresponding to the associated one of said plurality of word memories, wherein said data lines are connected in series through a plurality of third switch circuits, each third switch circuit corresponding to the associated one of said plurality of word memories, and located between mutually adjacent word memories to span a plurality of word memory groups.

Claim 6

An associative memory according to claim 2, wherein each third switch circuit is controlled by one of the associated said attribute discriminating circuits, and a data line connection control circuit is provided on each word memory.

Claim 7

An associative memory according to claim 2, wherein said gate circuits include a mode such that each gate circuit transmits information representing a match during the current retrieval to the associated one of said registers when detection of the match of data in both attribute and data during the current retrieval by the associated said data match detection circuit is detected.

Claim 8

An associative memory according to claim 2, further comprising second switch circuits for transmitting to the associated one of said gate circuits information representing one of a match and a mismatch during the previous retrieval and supplying the information to the associated said data line when the match of attribute during a current retrieval is received from said attribute match detection circuit, each second switch circuit corresponding to the associated one of said plurality of word memories.