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US5481484A Expired / Lapsed US ⏱️ 0.0 years remaining

Mixed mode simulation method and simulator

Assignee: Hitachi Ltd
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Filing: 1992-09-28
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Granted: 1996-01-02
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Expires: 2012-09-28
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Abstract

Abstract A mixed mode simulation method and apparatus are provided for highly accurately simulating the total characteristics of a digital analyzed circuit portion and an analog analyzed circuit portion, which are both subjected to mixed mode simulation, in consideration of the influence exerted on the analog analyzed circuit portion by a current consumed by the digital analyzed circuit portion. More particularly, a current value of an equivalent circuit for current calculation modeled for providing the analog analyzed circuit portion with a current generated due to an operating state of the digital analyzed circuit portion realized by logic simulation is determined in synchronism with the logic simulation, and the equivalent circuit for current calculation derived thereby is composed with the analog analyzed circuit portion, and this composite circuit is subjected to circuit simulation.

Inventors

  • 👤 Munehiro Ogawa, deceased
  • 👤 Masato Iwabuchi
  • 👤 Hitoshi Sugihara
  • 👤 Saburo Hojo
  • 👤 Masami Kinoshita
  • 👤 Osamu Yamashiro
  • 👤 Goichi Yokomizo
  • 👤 Mikako Miyama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 14:57
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33; G01; G01R; G01R31/00; G01R31/28; G01R31/3167; G06F30/36; G06F30/367

Claims Analysis

Total Claims: 24
Claim 1
Independent Claim 187 words
A mixed mode simulation method for mixedly executing logic simulation and circuit simulation so as to enable verification to be made for a noise current influence which is exerted to an analogy analyzed circuit portion realized by circuit simulation caused by a digital analyzed circuit portion realized by logic simulation, said method comprising: a first step of determining an analog component in a generated output due to an operating state of the digital analyzed circuit portion which is subjected to said logic simulation in synchronism with a logic operation of the digital analyzed circuit portion realized by said logic simulation, said analog component comprising an equivalent circuit for noise current calculation which is modeled for applying said analog analyzed circuit portion with a noise current generated in accordance with an operating state of said digital analyzed circuit portion; and the second step of forming the analog component determined by said first step with an equivalent circuit including a current source component to realize said analog component, and adding said equivalent circuit to said analog analyzed circuit portion subjected to said circuit simulation to execute said circuit simulation.
Claim 2
Dependent Claim 187 words
A mixed mode simulation method for mixedly executing logic simulation and circuit simulation so as to enable verification to be made for a noise current influence which is exerted to an analogy analyzed circuit portion realized by circuit simulation caused by a digital analyzed circuit portion realized by logic simulation, said method comprising: a first step of determining an analog component in a generated output due to an operating state of the digital analyzed circuit portion which is subjected to said logic simulation in synchronism with a logic operation of the digital analyzed circuit portion realized by said logic simulation, said analog component comprising an equivalent circuit for noise current calculation which is modeled for applying said analog analyzed circuit portion with a noise current generated in accordance with an operating state of said digital analyzed circuit portion; and the second step of forming the analog component determined by said first step with an equivalent circuit including a current source component to realize said analog component, and adding said equivalent circuit to said analog analyzed circuit portion subjected to said circuit simulation to execute said circuit simulation.
Claim 3
Dependent Claim 38 words
A mixed mode simulation method according to claim 1, wherein said first step for determining a state of an analog component includes calculating a current value for the current source component included said equivalent circuit for current calculation.
Claim 4
Dependent Claim 53 words
A mixed mode simulation method according to claim 2, wherein said circuit simulation at said second step is performed for a composite circuit composed of said equivalent circuit having a determined current value of said current source component and said analog analyzed circuit portion which are coupled by a power supply wiring component.
Claim 5
Dependent Claim 202 words
A mixed mode simulation method for mixedly executing logic simulation and circuit simulation so as to enable verification to be made for a noise current which is exerted to an analogy analyzed circuit portion realized by circuit simulation by a state of a digital analyzed circuit portion realized by logic simulation, said method comprising the steps of: setting an analysis switching time based on the earlier one of (1) a next scheduled time at which a signal is to be transferred from a circuit portion subjected to logic simulation to a circuit portion subjected to circuit simulation and (2) a scheduled time at which circuit simulation is to be next executed; generating control information for an equivalent circuit which includes a current source for simulating the noise current through said digital analyzed circuit portion on the basis of logic simulation and an operating state of said digital analyzed circuit portion realized by said logic simulation until the set analysis switching time; executing a noise circuit simulation for a composite circuit composed of said equivalent circuit for current calculation fed with said control information and said analog analyzed circuit portion; and repeating the above steps to synchronously advance circuit simulation and logic simulation.
Claim 6
Dependent Claim 202 words
A mixed mode simulation method for mixedly executing logic simulation and circuit simulation so as to enable verification to be made for a noise current which is exerted to an analogy analyzed circuit portion realized by circuit simulation by a state of a digital analyzed circuit portion realized by logic simulation, said method comprising the steps of: setting an analysis switching time based on the earlier one of (1) a next scheduled time at which a signal is to be transferred from a circuit portion subjected to logic simulation to a circuit portion subjected to circuit simulation and (2) a scheduled time at which circuit simulation is to be next executed; generating control information for an equivalent circuit which includes a current source for simulating the noise current through said digital analyzed circuit portion on the basis of logic simulation and an operating state of said digital analyzed circuit portion realized by said logic simulation until the set analysis switching time; executing a noise circuit simulation for a composite circuit composed of said equivalent circuit for current calculation fed with said control information and said analog analyzed circuit portion; and repeating the above steps to synchronously advance circuit simulation and logic simulation.
Claim 7
Dependent Claim 68 words
A mixed mode simulation method according to claim 4, wherein if a time earlier than said analysis switching time is present as a next scheduled time at which a signal is to be transferred from a circuit portion subjected to logic simulation to a circuit portion subjected to circuit simulation while executing said logic simulation, the newly present scheduled time is set as a new analysis switching time.
Claim 8
Dependent Claim 47 words
A mixed mode simulation method according to claim 5, wherein said equivalent circuit generates a current source component which is modeled to provide said analog analyzed circuit portion with the noise current which is generated in accordance with an operating state of said digital analyzed circuit portion.
Claim 9
Dependent Claim 208 words
A mixed mode simulation method for enabling verification to be made for the influence which is exerted on an analogy analyzed circuit portion realized by circuit simulation by a state of a digital analyzed circuit portion realized by logic simulation, said method comprising the steps of: assigning, to a logic element in the digital analyzed circuit portion, a logic model of a logic element whose output logic value is unitarily determined by a logic value inputted thereto and a current model which represents a state transition causing a change in current flowing through the logic model with a state variable being either of or a combination of the input logic value and the output logic value; executing logic simulation based on the logic model assigned to said logic element; calculating the value of a transient current generated by a change in the output of said logic element, based on the current model assigned to said logic element, in synchronism with said logic simulation; and providing said transient current value to a power supply net which models a power supply wiring system to which said logic element is connected, and executing circuit simulation for a circuit portion composed of said power supply net and an analog analyzed circuit portion.
Claim 10
Dependent Claim 208 words
A mixed mode simulation method for enabling verification to be made for the influence which is exerted on an analogy analyzed circuit portion realized by circuit simulation by a state of a digital analyzed circuit portion realized by logic simulation, said method comprising the steps of: assigning, to a logic element in the digital analyzed circuit portion, a logic model of a logic element whose output logic value is unitarily determined by a logic value inputted thereto and a current model which represents a state transition causing a change in current flowing through the logic model with a state variable being either of or a combination of the input logic value and the output logic value; executing logic simulation based on the logic model assigned to said logic element; calculating the value of a transient current generated by a change in the output of said logic element, based on the current model assigned to said logic element, in synchronism with said logic simulation; and providing said transient current value to a power supply net which models a power supply wiring system to which said logic element is connected, and executing circuit simulation for a circuit portion composed of said power supply net and an analog analyzed circuit portion.
Claim 11
Dependent Claim 26 words
A mixed mode simulation method according to claim 7, further comprising providing said power supply net only with a transient current above a predetermined threshold value.
Claim 12
Dependent Claim 53 words
A mixed mode simulation method according to claim 7, wherein a transient current is calculated in synchronism with said transient current generating timing on the basis of an output waveform of the logic element based on said current model which is represented by a waveform approximated by a polygonal line or a curve.
Claim 13
Dependent Claim 201 words
A mixed mode simulation apparatus for mixedly executing logic simulation and circuit simulation so as to enable verification to be made for an influence of a noise current exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analog analyzed circuit portion realized by circuit simulation, said apparatus comprising: means for executing logic simulation; determination means for determining an equivalent circuit for current calculation which is modeled for applying said analog analyzed circuit portion with a noise current generated in accordance with an operating state of said digital analyzed circuit portion, said equivalent circuit including a current source component generated due to an operating state of the digital analyzed circuit portion which is subjected to said logic simulation executed by said means, in synchronism with a logic operation of the digital analyzed circuit portion realized by said logic simulation; means coupled to the output of said determination means for forming said equivalent circuit for realizing the determined analog component in accordance therewith; means for coupling the output of said equivalent circuit forming means to said analog analyzed circuit portion to form a composite circuit; and simulation means for executing circuit simulation for said composite circuit.
Claim 14
Dependent Claim 201 words
A mixed mode simulation apparatus for mixedly executing logic simulation and circuit simulation so as to enable verification to be made for an influence of a noise current exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analog analyzed circuit portion realized by circuit simulation, said apparatus comprising: means for executing logic simulation; determination means for determining an equivalent circuit for current calculation which is modeled for applying said analog analyzed circuit portion with a noise current generated in accordance with an operating state of said digital analyzed circuit portion, said equivalent circuit including a current source component generated due to an operating state of the digital analyzed circuit portion which is subjected to said logic simulation executed by said means, in synchronism with a logic operation of the digital analyzed circuit portion realized by said logic simulation; means coupled to the output of said determination means for forming said equivalent circuit for realizing the determined analog component in accordance therewith; means for coupling the output of said equivalent circuit forming means to said analog analyzed circuit portion to form a composite circuit; and simulation means for executing circuit simulation for said composite circuit.
Claim 15
Dependent Claim 33 words
A mixed mode simulation apparatus according to claim 10, wherein said determination means includes calculation means for calculating a current value for the current source component included said equivalent circuit for current calculation.
Claim 16
Dependent Claim 58 words
A mixed mode simulation apparatus according to claim 11, wherein said said composite circuit forming means includes means for coupling said equivalent circuit having a determined current value of said current source component and said analog analyzed circuit portion through a power supply wiring component to constitute a composite circuit as a circuit portion subjected to circuit simulation.
Claim 17
Dependent Claim 262 words
A mixed mode simulation system for mixedly executing logic simulation and analog simulation so as to enable verification to be made for an influence of noise exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analog analyzed circuit portion realized by circuit simulation, the simulation system comprising: switching time setting means for setting an analysis switching time based on the earlier one of a next scheduled time at which a signal is to be transferred from a circuit portion subjected to logic simulation to a circuit portion subjected to circuit simulation and a scheduled time at which circuit simulation is to be next executed; generation means for generating control information for an equivalent circuit for calculating a noise current through said digital analyzed circuit portion on the basis of logic simulation and an operating state of said digital analyzed circuit portion realized by said logic simulation until the analysis switching time set by said setting means, said equivalent circuit including a current source component which is modeled for providing said analog analyzed circuit portion with a noise current which is generated in accordance with an operating state of said digital analyzed circuit portion; circuit simulation execution means responsive to the output of said generation means for executing circuit simulation for a composite circuit composed of said equivalent circuit and said analog analyzed circuit portion; and control means for controlling said setting means, said generation means and said execution means and repeating the processing of said each means to synchronously advance circuit simulation and logic simulation.
Claim 18
Dependent Claim 262 words
A mixed mode simulation system for mixedly executing logic simulation and analog simulation so as to enable verification to be made for an influence of noise exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analog analyzed circuit portion realized by circuit simulation, the simulation system comprising: switching time setting means for setting an analysis switching time based on the earlier one of a next scheduled time at which a signal is to be transferred from a circuit portion subjected to logic simulation to a circuit portion subjected to circuit simulation and a scheduled time at which circuit simulation is to be next executed; generation means for generating control information for an equivalent circuit for calculating a noise current through said digital analyzed circuit portion on the basis of logic simulation and an operating state of said digital analyzed circuit portion realized by said logic simulation until the analysis switching time set by said setting means, said equivalent circuit including a current source component which is modeled for providing said analog analyzed circuit portion with a noise current which is generated in accordance with an operating state of said digital analyzed circuit portion; circuit simulation execution means responsive to the output of said generation means for executing circuit simulation for a composite circuit composed of said equivalent circuit and said analog analyzed circuit portion; and control means for controlling said setting means, said generation means and said execution means and repeating the processing of said each means to synchronously advance circuit simulation and logic simulation.
Claim 19
Dependent Claim 74 words
A mixed mode simulation system according to claim 13, further comprising update setting means for setting, if a time earlier than said analysis switching time is present as a next scheduled time at which a signal is to be transferred from a circuit portion subjected to logic simulation to a circuit portion subjected to circuit simulation while executing said logic simulation, the newly present scheduled time is set as a new analysis switching time.
Claim 20
Dependent Claim 254 words
A mixed mode simulation system for enabling verification to be made for the influence of power consumption which is exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analogy analyzed circuit portion realized by circuit simulation, the simulation system comprising: an assignment table for assigning, to a logic element in a logic analyzed circuit portion, a logic model of a logic element whose output logic value is unitarily determined by a logic value inputted thereto and a current model which represents a state transition attributable to power consumption causing a change in current flowing through the logic model with a state variable being either of or a combination of the input logic value and the output logic value; logic simulation execution means for executing logic simulation based on the logic model assigned to said logic element; calculation means for calculating the value of a transient power consumption current generated by a change in the output of said logic element, based on the current model assigned to said logic element, in synchronism with said logic simulation; and circuit simulation execution means coupled to said calculation means for providing said transient power consumption current value to a power supply net which models a power supply wiring system to which said logic element is connected, the power supply net including a modeled power consumption current element, the circuit simulation execution means executing circuit simulation for a composite circuit composed of said power supply net and an analog analyzed circuit portion.
Claim 21
Dependent Claim 254 words
A mixed mode simulation system for enabling verification to be made for the influence of power consumption which is exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analogy analyzed circuit portion realized by circuit simulation, the simulation system comprising: an assignment table for assigning, to a logic element in a logic analyzed circuit portion, a logic model of a logic element whose output logic value is unitarily determined by a logic value inputted thereto and a current model which represents a state transition attributable to power consumption causing a change in current flowing through the logic model with a state variable being either of or a combination of the input logic value and the output logic value; logic simulation execution means for executing logic simulation based on the logic model assigned to said logic element; calculation means for calculating the value of a transient power consumption current generated by a change in the output of said logic element, based on the current model assigned to said logic element, in synchronism with said logic simulation; and circuit simulation execution means coupled to said calculation means for providing said transient power consumption current value to a power supply net which models a power supply wiring system to which said logic element is connected, the power supply net including a modeled power consumption current element, the circuit simulation execution means executing circuit simulation for a composite circuit composed of said power supply net and an analog analyzed circuit portion.
Claim 22
Dependent Claim 28 words
A mixed mode simulation system according to claim 15, further comprising means for providing said power supply net only with a transient current above a predetermined threshold value.
Claim 23
Dependent Claim 277 words
A mixed mode simulation system for enabling verification to be made for a transient current influence which is exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analogy analyzed circuit portion realized by circuit simulation, the simulation system comprising: an assignment table for assigning, to a logic element in a logic analyzed circuit portion, a logic model of a logic element whose output logic value is unitarily determined by a logic value inputted thereto and a current model which represents a state transition causing a transient change in current flowing through the logic model with a state variable being either of or a combination of the input logic value and the output logic value; logic simulation execution means for executing logic simulation based on the logic model assigned to said logic element; calculation means for calculating the value of a transient current generated by a transient change in the output of said logic element, based on the current model assigned to said logic element, in synchronism with said logic simulation; circuit simulation execution means coupled to said calculation means for providing said transient current value to a power supply net which models a power supply wiring system to which said logic element is connected, and executing circuit simulation for a composite circuit composed of said power supply net and an analog analyzed circuit portion; and calculation means for calculating the transient current in synchronism with said transient current generating timing on the basis of an output waveform of the logic element based on said current model which is represented by a waveform approximated by a polygonal line or a curve.
Claim 24
Dependent Claim 277 words
A mixed mode simulation system for enabling verification to be made for a transient current influence which is exerted by a state of a digital analyzed circuit portion realized by logic simulation on an analogy analyzed circuit portion realized by circuit simulation, the simulation system comprising: an assignment table for assigning, to a logic element in a logic analyzed circuit portion, a logic model of a logic element whose output logic value is unitarily determined by a logic value inputted thereto and a current model which represents a state transition causing a transient change in current flowing through the logic model with a state variable being either of or a combination of the input logic value and the output logic value; logic simulation execution means for executing logic simulation based on the logic model assigned to said logic element; calculation means for calculating the value of a transient current generated by a transient change in the output of said logic element, based on the current model assigned to said logic element, in synchronism with said logic simulation; circuit simulation execution means coupled to said calculation means for providing said transient current value to a power supply net which models a power supply wiring system to which said logic element is connected, and executing circuit simulation for a composite circuit composed of said power supply net and an analog analyzed circuit portion; and calculation means for calculating the transient current in synchronism with said transient current generating timing on the basis of an output waveform of the logic element based on said current model which is represented by a waveform approximated by a polygonal line or a curve.

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3.5 Years (Year 4) 1999-01-01 1999-07-03 2000-01-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-01-01 2003-07-03 2004-01-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-01-01 2007-07-03 2008-01-02 $7700.00 Window Closed / Lapsed

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