US5479073A
Expired / Lapsed
US
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Dot clock generator for liquid crystal display device
Assignee: Innolux Corp
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Filing: 1994-09-30
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Granted: 1995-12-26
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Expires: 2014-09-30
Abstract
Abstract To generate a dot clock for a liquid crystal display device from a horizontal sync signal with reduced skew, a phase locked loop (PLL) is divided into three functional parts. The first part generates a particular frequency by supplying voltage from a latch type DAC (digital/analog converter) to a VCO (voltage controller oscillator). A horizontal sync signal is estimated from the dot clock signal that is finally generated and the output value of the DAC is increased or decreased in accordance with the difference between this estimated horizontal sync signal and the actual horizontal sync signal. This increase or decrease correction is made at, for example, the vertical sync timing. The second part achieves synchronization. A signal corresponding to the phase error between the actual horizontal sync signal and the dot clock signal is added to the signal from the DAC to control the phase of the dot clock. The third part is a PLL for generating the dot clock in accordance with the signal generated by the first part at the particular frequency.
Inventors
- 👤 Johji Mamiya
- 👤 Hironari Nishino
- 👤 Kohnji Ishii
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 06:23
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/003; G09G5/006; G09G5/008; H; H03; H03L; H03L7/00; H03L7/06; H03L7/07; H03L7/16; H03L7/18; H04; H04N; H04N5/00; H04N5/04; H04N5/12; H04N5/126
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
160 words
A dot clock generator for a liquid crystal display device, comprising: a reference voltage generator means including a latch type digital/analog converter; a voltage controlled oscillator means which oscillates according to a reference voltage from said reference voltage generator means to produce a reference clock; a phase locked loop circuit means for producing a dot clock according to said reference clock; means for producing a horizontal period signal from said dot clock; means for receiving an external horizontal period signal; means for detecting a phase error between said horizontal period signal generated from said dot clock and said horizontal period signal received externally; means for adjusting the latched data of said analog/digital converter according to said phase error in a first period which is longer than said horizontal period; and means for adjusting said reference voltage to be inputted to said voltage controlled oscillator according to said phase error in a second period which is shorter than said first period.
Claim 2
Dependent Claim
160 words
A dot clock generator for a liquid crystal display device, comprising: a reference voltage generator means including a latch type digital/analog converter; a voltage controlled oscillator means which oscillates according to a reference voltage from said reference voltage generator means to produce a reference clock; a phase locked loop circuit means for producing a dot clock according to said reference clock; means for producing a horizontal period signal from said dot clock; means for receiving an external horizontal period signal; means for detecting a phase error between said horizontal period signal generated from said dot clock and said horizontal period signal received externally; means for adjusting the latched data of said analog/digital converter according to said phase error in a first period which is longer than said horizontal period; and means for adjusting said reference voltage to be inputted to said voltage controlled oscillator according to said phase error in a second period which is shorter than said first period.
Claim 3
Dependent Claim
26 words
A dot clock generator for a liquid crystal display device, as claimed in claim 1, wherein said voltage controlled oscillator means is provided with a resonator.
Claim 4
Dependent Claim
23 words
A dot clock generator for a liquid crystal display device, as claimed in claim 2, wherein said first period is a vertical period.
Claim 5
Dependent Claim
23 words
A dot clock generator for a liquid crystal display device, as claimed in claim 3, wherein said second period is a horizontal period.
Claim 6
Dependent Claim
48 words
A dot clock generator for a liquid crystal display device, as claimed in claim 4, wherein said phase locked loop circuit means has a phase comparator having a reference input which receives a signal whose period is shorter than the horizontal period generated according to said reference clock.
Claim 7
Dependent Claim
23 words
A dot clock generator for a liquid crystal display device, as claimed in claim 1, wherein said first period is a vertical period.
Claim 8
Dependent Claim
23 words
A dot clock generator for a liquid crystal display device, as claimed in claim 6, wherein said second period is a horizontal period.
Claim 9
Dependent Claim
48 words
A dot clock generator for a liquid crystal display device, as claimed in claim 7, wherein said phase locked loop circuit means has a phase comparator having a reference input which receives a signal whose period is shorter than the horizontal period generated according to said reference clock.
Claim 10
Dependent Claim
23 words
A dot clock generator for a liquid crystal display device, as claimed in claim 1, wherein said second period is a horizontal period.
Claim 11
Dependent Claim
48 words
A dot clock generator for a liquid crystal display device, as claimed in claim 9, wherein said phase locked loop circuit means has a phase comparator having a reference input which receives a signal whose period is shorter than the horizontal period generated according to said reference clock.
Claim 12
Dependent Claim
48 words
A dot clock generator for a liquid crystal display device, as claimed in claim 1, wherein said phase locked loop circuit means has a phase comparator having a reference input which receives a signal whose period is shorter than the horizontal period generated according to said reference clock.
Claim 13
Dependent Claim
207 words
A liquid crystal display device comprising: a liquid crystal display element; a display control means for generating a digital video signal based on analog video and sync signals and providing said digital video signal to said liquid crystal display element; a reference voltage generator means including a latch type digital/analog converter; a voltage controlled oscillator means which oscillates according to a reference voltage from said reference voltage generator means to produce a reference clock; a phase locked loop circuit means for producing a dot clock according to said reference clock; means for producing a horizontal period signal from said dot clock; means for receiving a horizontal period signal according to said sync signal; means for detecting a phase error between said horizontal period signal generated from said dot clock and said horizontal period signal according to said sync signal; means for adjusting the latched data of said analog/digital converter according to said phase error in a first period which is longer than said horizontal period; means for adjusting said reference voltage to be inputted to said voltage controlled oscillator according to said phase error in a second period which is shorter than said first period; and means for providing said dot clock to said display control means.
Claim 14
Dependent Claim
207 words
A liquid crystal display device comprising: a liquid crystal display element; a display control means for generating a digital video signal based on analog video and sync signals and providing said digital video signal to said liquid crystal display element; a reference voltage generator means including a latch type digital/analog converter; a voltage controlled oscillator means which oscillates according to a reference voltage from said reference voltage generator means to produce a reference clock; a phase locked loop circuit means for producing a dot clock according to said reference clock; means for producing a horizontal period signal from said dot clock; means for receiving a horizontal period signal according to said sync signal; means for detecting a phase error between said horizontal period signal generated from said dot clock and said horizontal period signal according to said sync signal; means for adjusting the latched data of said analog/digital converter according to said phase error in a first period which is longer than said horizontal period; means for adjusting said reference voltage to be inputted to said voltage controlled oscillator according to said phase error in a second period which is shorter than said first period; and means for providing said dot clock to said display control means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-12-25 | 1999-06-26 | 1999-12-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-12-25 | 2003-06-26 | 2003-12-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-12-25 | 2007-06-26 | 2007-12-26 | $7700.00 | Window Closed / Lapsed |