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US5477485A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for programming a single EPROM or FLASH memory cell to store multiple levels of data that utilizes a floating substrate

Assignee: National Semiconductor Corp
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Filing: 1995-02-22
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Granted: 1995-12-19
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Expires: 2015-02-22
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Abstract

Abstract Multiple logic levels can be programmed into a single EPROM or FLASH memory cell by applying one of a corresponding number of programming voltages to the control gate of a memory cell that is biased so that the source-to-substrate junction becomes forward-biased and the drain-to-substrate junction becomes reverse-biased. During programming, the bias conditions form substrate hot electrons which, in addition to the channel hot electrons, accumulate on the floating gate. By utilizing the substrate hot electrons, a much lower control gate voltage can be utilized during programming. More importantly, however, once the channel hot electrons cease to exist, the substrate hot electrons and holes converge to a stable charge that is related to the control gate voltage used during programming and the programmed threshold voltage of the cell.

Inventors

  • 👤 Albert Bergemont
  • 👤 Min-Hwa Chi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 20:22
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/56; G11C11/5621; G11C11/5628

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 134 words
A method for programming a single floating-gate memory cell to store one of three or more threshold voltages, the memory cell having a source formed in a substrate, a drain formed in the substrate a distance apart from the source, a floating gate formed over the substrate, and a control gate formed over the floating gate, the method comprising the steps of: selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; floating the substrate; applying a first voltage to the source; applying a second voltage to the drain wherein the second voltage is greater than the first voltage; and applying the selected programming voltage to the control gate of the memory cell for a predetermined time.
Claim 2
Independent Claim 134 words
A method for programming a single floating-gate memory cell to store one of three or more threshold voltages, the memory cell having a source formed in a substrate, a drain formed in the substrate a distance apart from the source, a floating gate formed over the substrate, and a control gate formed over the floating gate, the method comprising the steps of: selecting one of three or more programming voltages as a selected programming voltage, the three or more programming voltages corresponding to said three or more threshold voltages; floating the substrate; applying a first voltage to the source; applying a second voltage to the drain wherein the second voltage is greater than the first voltage; and applying the selected programming voltage to the control gate of the memory cell for a predetermined time.
Claim 3
Dependent Claim 11 words
The method of claim 1 wherein the first voltage includes ground.
Claim 4
Dependent Claim 18 words
The method of claim 1 wherein a maximum programming voltage is less than or equal to five volts.
Claim 5
Dependent Claim 17 words
The method of claim 1 wherein the predetermined time is less than or equal to two seconds.
Claim 6
Dependent Claim 18 words
The method of claim 1 wherein the second voltage falls within a range of four to eight volts.

References Cited (Backward Citations)

US5021999A Cited
US5043940A Cited
US5394362A Cited
US5418743A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-12-18 1999-06-19 1999-12-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-12-18 2003-06-19 2003-12-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-12-18 2007-06-19 2007-12-19 $7700.00 Window Closed / Lapsed

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