US5469398A
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Selectable width, brustable FIFO
Assignee: Silicon Systems Inc
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Filing: 1991-09-10
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Granted: 1995-11-21
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Expires: 2011-09-10
Abstract
Abstract A selectable width, burstable FIFO is described. A register memory stores x-bit and y-bit data. Each register of the register memory is y+1 bits wide. Y bits store x-bit and y-bit data and 1-bit tracks the data width within each register. A Burst Ready Logic means accepts an m-bit input to select a burst length from 2 m possible burst lengths. Based on the m-bit input, the Burst Ready Logic outputs a signal indicating when the FIFO is burstable. The empty and full FIFO conditions are determined using a digital hysteresis. In one embodiment, the FIFO is used in an IBM-AT environment. Eight registers store 8-bit and 16-bit data. Each register is 17-bits wide so that 16-bits store 8-bit and 16-bit data. The remaining bit tracks whether the register contains 8-bit or 16-bit data. In this embodiment, the Burst Ready Logic accepts a 2-bit input to select from possible burst lengths of 1, 2, 4 or 8 bytes.
Inventors
- 👤 Michael Scott
- 👤 David Browning
- 👤 Michael Holt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 18:11
CPC Classifications
G; G06; G06F; G06F5/00; G06F5/06; G06F5/10
Claims Analysis
Total Claims: 62
Claim 1
Independent Claim
102 words
A FIFO for receiving and outputting data such that the data first provided to said FIFO is the data first provided from FIFO comprising: a plurality of storage elements; a first input signal for designating a maximum burst length L of data from a plurality of burst lengths; pointer means for selecting a storage element out of said plurality of storage elements; first logic means coupled to said pointer means for receiving said first input signal and providing a control signal to indicate when a burst of said length L can be provided to and provided from said plurality of storage elements.
Claim 2
Dependent Claim
102 words
A FIFO for receiving and outputting data such that the data first provided to said FIFO is the data first provided from FIFO comprising: a plurality of storage elements; a first input signal for designating a maximum burst length L of data from a plurality of burst lengths; pointer means for selecting a storage element out of said plurality of storage elements; first logic means coupled to said pointer means for receiving said first input signal and providing a control signal to indicate when a burst of said length L can be provided to and provided from said plurality of storage elements.
Claim 3
Dependent Claim
18 words
The FIFO of claim 1 wherein said plurality of burst lengths comprises 1, 2, 4 and 8 bytes.
Claim 4
Dependent Claim
37 words
The FIFO of claim 1 wherein said first logic means also provides a first output signal when said FIFO is in a first condition and a second output signal when said FIFO is in a second condition.
Claim 5
Dependent Claim
19 words
The FIFO of claim 3 wherein said first condition exists when only one x-bit byte remains in said FIFO.
Claim 6
Dependent Claim
21 words
The FIFO of claim 3 wherein said second condition exists when space for only one x-bit byte remains in said FIFO.
Claim 7
Dependent Claim
18 words
The FIFO of claim 1 further comprising: clock means for clocking data into and from said storage means.
Claim 8
Dependent Claim
27 words
The FIFO of claim 1 wherein said pointer means comprise a first and a second n-bit counter for selecting memory locations in said plurality of storage elements.
Claim 9
Dependent Claim
18 words
The FIFO of claim 7 wherein said first and said second n-bit counters are 3-bit gray code counters.
Claim 10
Dependent Claim
14 words
The FIFO of claim 1 wherein said storage means comprises a plurality of registers.
Claim 11
Dependent Claim
15 words
The FIFO of claim 9 wherein the number of said plurality of registers comprises 8.
Claim 12
Dependent Claim
45 words
The FIFO of claim 9 wherein each of said plurality of registers is y+1 bits wide so that y-bits store said x-bit or said y-bit data and a width bit tracks whether each of said plurality of registers contains said x-bit or said y-bit data.
Claim 13
Dependent Claim
7 words
The FIFO of claim 9 wherein x=8.
Claim 14
Dependent Claim
7 words
The FIFO of claim 9 wherein y=16.
Claim 15
Dependent Claim
37 words
The FIFO of claim 1 further comprising: second logic means for providing a first signal when said FIFO is in a first condition and for providing a second signal when said FIFO is in a second condition.
Claim 16
Dependent Claim
15 words
The FIFO of claim 14 wherein said first condition exists when said FIFO is empty.
Claim 17
Dependent Claim
15 words
The FIFO of claim 14 wherein said second condition exists when said FIFO is full.
Claim 18
Dependent Claim
122 words
A FIFO comprising: storage means having a plurality of storage elements for receiving and outputting data such that data first received by said storage means is data first outputted by said storage means, said data comprising a plurality of words having a plurality of bit widths Z, said data such that a word having the largest bit width has a bit width w, said plurality of storage elements such that an element is at least w+y bits wide where 2 y ≧Z so that w bits are used to store said data and y bits are used to indicate the width of said data stored in said element; pointer means for selecting a storage element out of said plurality of storage elements.
Claim 19
Dependent Claim
122 words
A FIFO comprising: storage means having a plurality of storage elements for receiving and outputting data such that data first received by said storage means is data first outputted by said storage means, said data comprising a plurality of words having a plurality of bit widths Z, said data such that a word having the largest bit width has a bit width w, said plurality of storage elements such that an element is at least w+y bits wide where 2 y ≧Z so that w bits are used to store said data and y bits are used to indicate the width of said data stored in said element; pointer means for selecting a storage element out of said plurality of storage elements.
Claim 20
Dependent Claim
16 words
The FIFO of claim 17 wherein said plurality of storage elements comprises a plurality of registers.
Claim 21
Dependent Claim
41 words
The FIFO of claim 18 wherein each of said plurality of registers is w+1 bits wide so that w-bits are used to store x-bit and w-bit data and one bit is used to track the width of data within each register.
Claim 22
Dependent Claim
15 words
The FIFO of claim 18 wherein the number of said plurality of registers comprises 8.
Claim 23
Dependent Claim
7 words
The FIFO of claim 19 wherein w=16.
Claim 24
Dependent Claim
7 words
The FIFO of claim 19 wherein x=8.
Claim 25
Dependent Claim
66 words
The FIFO of claim 17 further comprising: a first input signal for designating a maximum burst length L of data from a plurality of burst lengths; and first logic means coupled to said pointer means for receiving said first input signal and for providing a control signal to indicate when a burst of said length L can be received by and outputted by said storage means.
Claim 26
Dependent Claim
18 words
The FIFO of claim 23 wherein said plurality of burst lengths comprises 1, 2, 4 and 8 bytes.
Claim 27
Dependent Claim
37 words
The FIFO of claim 23 wherein said first logic means also provides a first output signal when said FIFO is in a first condition and a second output signal when said FIFO is in a second condition.
Claim 28
Dependent Claim
19 words
The FIFO of claim 25 wherein said first condition exists when only one x-bit byte remains in said FIFO.
Claim 29
Dependent Claim
21 words
The FIFO of claim 25 wherein said second condition exists when space for only one x-bit byte remains in said FIFO.
Claim 30
Dependent Claim
18 words
The FIFO of claim 17 further comprising: clock means for clocking data into and from said storage means.
Claim 31
Dependent Claim
25 words
The FIFO of claim 17 wherein said pointer means comprises a first and second n-bit counter for selecting memory locations said plurality of storage elements.
Claim 32
Dependent Claim
18 words
The FIFO of claim 29 wherein said first and said second n-bit counters are 3-bit Gray code counters.
Claim 33
Dependent Claim
35 words
The FIFO of claim 17 further comprising first logic means for providing a first signal when said FIFO is in a first condition and a second signal when said FIFO is in a second condition.
Claim 34
Dependent Claim
15 words
The FIFO of claim 31 wherein said first condition exists when said FIFO is empty.
Claim 35
Dependent Claim
15 words
The FIFO of claim 31 wherein said second condition exists when said FIFO is full.
Claim 36
Independent Claim
172 words
An apparatus for determining a first or second condition in a FIFO comprising a plurality of storage elements, said apparatus comprising: pointer means for providing a plurality of counter outputs to indicate a location in said plurality of storage elements, said plurality of counter outputs comprising a read pointer and a write pointer to indicate a location to read from and write to in said storage elements respectively; comparing means for receiving said plurality of counter outputs, for generating a third condition if a value of said read pointer is less than a value of said write pointer, for generating a fourth condition if a value of said read pointer is greater than a value of said write pointer, for generating said first condition if a value of said read pointer is equal to a value of said write pointer and said third condition exists, and for generating said second condition if a value of said read pointer is equal to a value of said write pointer and said fourth condition exists.
Claim 37
Independent Claim
172 words
An apparatus for determining a first or second condition in a FIFO comprising a plurality of storage elements, said apparatus comprising: pointer means for providing a plurality of counter outputs to indicate a location in said plurality of storage elements, said plurality of counter outputs comprising a read pointer and a write pointer to indicate a location to read from and write to in said storage elements respectively; comparing means for receiving said plurality of counter outputs, for generating a third condition if a value of said read pointer is less than a value of said write pointer, for generating a fourth condition if a value of said read pointer is greater than a value of said write pointer, for generating said first condition if a value of said read pointer is equal to a value of said write pointer and said third condition exists, and for generating said second condition if a value of said read pointer is equal to a value of said write pointer and said fourth condition exists.
Claim 38
Dependent Claim
24 words
The apparatus of claim 34 wherein a first number of said counter outputs are provided by a read pointer comprising a first n-bit counter.
Claim 39
Dependent Claim
16 words
The apparatus of claim 35 wherein said first n-bit counter is a 3-bit Gray code counter.
Claim 40
Dependent Claim
24 words
The apparatus of claim 35 wherein a second number of said counter outputs are provided by a write pointer comprising a second n-bit counter.
Claim 41
Dependent Claim
16 words
The apparatus of claim 37 wherein said second n-bit counter is a 3-bit Gray code counter.
Claim 42
Dependent Claim
15 words
The apparatus of claim 34 wherein said first condition exists when said FIFO is empty.
Claim 43
Dependent Claim
15 words
The apparatus of claim 34 wherein said second condition exists when said FIFO is full.
Claim 44
Dependent Claim
16 words
The apparatus of claim 34 wherein said third condition exists when said FIFO is nearly empty.
Claim 45
Dependent Claim
16 words
The apparatus of claim 34 wherein said fourth condition exists when said FIFO is nearly full.
Claim 46
Dependent Claim
199 words
A FIFO comprising: storage means for receiving and outputting data such that data first received by said storage means is the data first outputted by said storage means; first means for providing clock signals to said storage means when said storage means is receiving data and for providing a plurality of first counter outputs; second means for providing clock signals to said storage means when said storage means is outputting data and for providing a plurality of second counter outputs; first logic means for receiving said first and second counter outputs and for providing a first output signal when said FIFO is in a first condition and a second output signal when said FIFO is in a second condition; second logic means for receiving certain of said first and second counter outputs and for providing a third counter output; a first input signal for designating a maximum burst length L of data from a plurality of burst lengths; and third logic means for receiving said first input signal, said third counter output and said first and second output signals and for controlling when a burst of said length L can be received by and outputted from said storage means.
Claim 47
Dependent Claim
199 words
A FIFO comprising: storage means for receiving and outputting data such that data first received by said storage means is the data first outputted by said storage means; first means for providing clock signals to said storage means when said storage means is receiving data and for providing a plurality of first counter outputs; second means for providing clock signals to said storage means when said storage means is outputting data and for providing a plurality of second counter outputs; first logic means for receiving said first and second counter outputs and for providing a first output signal when said FIFO is in a first condition and a second output signal when said FIFO is in a second condition; second logic means for receiving certain of said first and second counter outputs and for providing a third counter output; a first input signal for designating a maximum burst length L of data from a plurality of burst lengths; and third logic means for receiving said first input signal, said third counter output and said first and second output signals and for controlling when a burst of said length L can be received by and outputted from said storage means.
Claim 48
Dependent Claim
37 words
The FIFO of claim 43 wherein said third logic means also provides a third output signal when said FIFO is in a third condition and a fourth output signal when said FIFO is in a fourth condition.
Claim 49
Dependent Claim
19 words
The FIFO of claim 44 wherein said third condition exists when only one x-bit byte remains in said FIFO.
Claim 50
Dependent Claim
21 words
The FIFO of claim 45 wherein said fourth condition exists when space for only one x-bit byte remains in said FIFO.
Claim 51
Dependent Claim
15 words
The FIFO of claim 43 wherein said third counter output is provided in binary form.
Claim 52
Dependent Claim
62 words
The FIFO of claim 43 wherein said first condition exists when a third condition exists and a first of said first counter outputs is equal to a first of said second counter outputs and wherein said second condition exists when a fourth condition exists and said first of said first counter outputs is equal to said first of said second counter outputs.
Claim 53
Dependent Claim
52 words
The FIFO of claim 48 wherein said third condition exists when said first of said first counter outputs is equal to a second of said second counter outputs and wherein said fourth condition exists when said first of said second counter outputs is equal to a second of said first counter outputs.
Claim 54
Dependent Claim
25 words
The FIFO of claim 43 wherein said first condition exists when said FIFO is empty and said second condition exists when said FIFO is full.
Claim 55
Dependent Claim
18 words
The FIFO of claim 48 wherein said first and second means comprise first and second n-bit counters, respectively.
Claim 56
Dependent Claim
17 words
The FIFO of claim 51 wherein said first and second n-bit counters are 3-bit Gray code counters.
Claim 57
Dependent Claim
18 words
The FIFO of claim 43 wherein said plurality of burst lengths comprise 1, 2, 4 and 8 bytes.
Claim 58
Dependent Claim
88 words
The FIFO of claim 43 wherein said storage means comprises a plurality of storage elements; said data comprises a plurality of words having a plurality of bit widths Z; said data such that a word having the largest bit width has a bit width w; said plurality of storage elements such that an element is at least w+y bits wide where 2y>Z so that w bits are used to store said data and y bits are used to indicate the width of said data stored in said element.
Claim 59
Dependent Claim
16 words
The FIFO of claim 54 wherein said plurality of storage elements comprises a plurality of registers.
Claim 60
Dependent Claim
10 words
The FIFO of claim 54 wherein Z=2, W=16 and y=1.
Claim 61
Dependent Claim
15 words
The FIFO of claim 55 wherein the number of said plurality of registers comprises 8.
Claim 62
Dependent Claim
20 words
The apparatus of claim 34 further comprising clock means for clocking data into and from said plurality of storage elements.
References Cited (Backward Citations)
US3763480A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-11-20 | 1999-05-22 | 1999-11-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-11-20 | 2003-05-22 | 2003-11-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-11-20 | 2007-05-22 | 2007-11-21 | $7700.00 | Window Closed / Lapsed |