Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
222 words
In an electrical energy meter of the type containing a serial input/output port, a microprocessor-controlled electronic register containing memory and an execution clock therein for controlling register operations, a serial receiver and transmitter, connected between the electronic register and the serial input/output port, and a main crystal oscillator, a method of serially processing a string of binary input characters asynchronously received at a first data rate at the serial input/output port and transferred by the serial receiver to the electronic register, comprising the steps of: detecting receipt of a first of the string of binary input characters at the serial input/output port of said electrical energy meter; sampling the detected first binary input character by generating a first sampling clock signal internal to the electronic register of said electrical energy meter which is phase-synchronized with a least significant bit of the detected first binary input character, but has a frequency unequal to the first data rate; detecting receipt of a second of the string of binary input characters at the serial input/output port; and sampling the detected second binary input character by generating a second sampling clock signal internal to the electronic register which is phase-synchronized with the least significant bit of the detected second binary input character and has a frequency equal to the frequency of the first sampling clock signal.
Claim 2
Dependent Claim
222 words
In an electrical energy meter of the type containing a serial input/output port, a microprocessor-controlled electronic register containing memory and an execution clock therein for controlling register operations, a serial receiver and transmitter, connected between the electronic register and the serial input/output port, and a main crystal oscillator, a method of serially processing a string of binary input characters asynchronously received at a first data rate at the serial input/output port and transferred by the serial receiver to the electronic register, comprising the steps of: detecting receipt of a first of the string of binary input characters at the serial input/output port of said electrical energy meter; sampling the detected first binary input character by generating a first sampling clock signal internal to the electronic register of said electrical energy meter which is phase-synchronized with a least significant bit of the detected first binary input character, but has a frequency unequal to the first data rate; detecting receipt of a second of the string of binary input characters at the serial input/output port; and sampling the detected second binary input character by generating a second sampling clock signal internal to the electronic register which is phase-synchronized with the least significant bit of the detected second binary input character and has a frequency equal to the frequency of the first sampling clock signal.
Claim 3
Dependent Claim
59 words
The method of claim 1, wherein said first binary input character sampling step comprises the step of sampling the detected first binary input character by generating a first sampling clock signal internal to the electronic register of said electrical energy meter which is phase-synchronized with a center of a least significant bit of the detected first binary input character.
Claim 4
Dependent Claim
24 words
The method of claim 1, wherein a frequency of the main crystal oscillator is unequal to an integer multiple of the first data rate.
Claim 5
Dependent Claim
26 words
The method of claim 3, wherein a frequency of the instruction execution clock equals an integer multiple of the frequency of the first sampling clock signal.
Claim 6
Dependent Claim
25 words
The method of claim 3, wherein the first sampling clock signal and the second sampling clock signal are out of phase relative to each other.
Claim 7
Dependent Claim
64 words
The method of claim 1, wherein the first data rate is 9600 bits/sec and the frequency of the first sampling clock signal is between 9600 bits/sec and 9728 bits/sec so that the phase synchronization between the first sampling clock signal and a most significant bit of the detected first binary input character is within 10 percent of the width of the most significant bit.
Claim 8
Dependent Claim
31 words
The method of claim 6, wherein said first and second binary input character sampling steps respectively comprise the steps of writing the first and second binary input characters to the memory.